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author | John Crispin <blogic@openwrt.org> | 2013-04-25 19:03:32 +0000 |
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committer | John Crispin <blogic@openwrt.org> | 2013-04-25 19:03:32 +0000 |
commit | d88043aa65dea525223f4543bfe6278f28574705 (patch) | |
tree | be4ca50460a3d01f56c91501f344a8b50f338d72 /target/linux/lantiq/dts/amazonse.dtsi | |
parent | d8d3d5959bc45870394899ce36dd9fa06bdf058b (diff) | |
download | master-187ad058-d88043aa65dea525223f4543bfe6278f28574705.tar.gz master-187ad058-d88043aa65dea525223f4543bfe6278f28574705.tar.bz2 master-187ad058-d88043aa65dea525223f4543bfe6278f28574705.zip |
lantiq: move dts files to thir own folder
Signed-off-by: John Crispin <blogic@openwrt.org>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@36443 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/lantiq/dts/amazonse.dtsi')
-rw-r--r-- | target/linux/lantiq/dts/amazonse.dtsi | 148 |
1 files changed, 148 insertions, 0 deletions
diff --git a/target/linux/lantiq/dts/amazonse.dtsi b/target/linux/lantiq/dts/amazonse.dtsi new file mode 100644 index 0000000000..13d3e73860 --- /dev/null +++ b/target/linux/lantiq/dts/amazonse.dtsi @@ -0,0 +1,148 @@ +/ { + #address-cells = <1>; + #size-cells = <1>; + compatible = "lantiq,xway", "lantiq,ase"; + + cpus { + cpu@0 { + compatible = "mips,mips4Kc"; + }; + }; + + biu@1F800000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "lantiq,biu", "simple-bus"; + reg = <0x1F800000 0x800000>; + ranges = <0x0 0x1F800000 0x7FFFFF>; + + icu0: icu@80200 { + #interrupt-cells = <1>; + interrupt-controller; + compatible = "lantiq,icu"; + reg = <0x80200 0x28 + 0x80228 0x28 + 0x80250 0x28 + 0x80278 0x28 + 0x802a0 0x28>; + }; + + watchdog@803F0 { + compatible = "lantiq,wdt"; + reg = <0x803F0 0x10>; + }; + }; + + sram@1F000000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "lantiq,sram", "simple-bus"; + reg = <0x1F000000 0x800000>; + ranges = <0x0 0x1F000000 0x7FFFFF>; + + eiu0: eiu@101000 { + #interrupt-cells = <1>; + compatible = "lantiq,eiu-xway"; + reg = <0x101000 0x1000>; + interrupt-parent = <&icu0>; + interrupts = <29 30 31>; + }; + + pmu0: pmu@102000 { + compatible = "lantiq,pmu-xway"; + reg = <0x102000 0x1000>; + }; + + cgu0: cgu@103000 { + compatible = "lantiq,cgu-xway"; + reg = <0x103000 0x1000>; + #clock-cells = <1>; + }; + + rcu0: rcu@203000 { + compatible = "lantiq,rcu-xway"; + reg = <0x203000 0x1000>; + }; + }; + + fpi@10000000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "lantiq,fpi", "simple-bus"; + ranges = <0x0 0x10000000 0xEEFFFFF>; + reg = <0x10000000 0xEF00000>; + + spi@E100800 { + compatible = "lantiq,spi-xway"; + reg = <0xE100800 0x100>; + interrupt-parent = <&icu0>; + interrupts = <24 25 26>; + #address-cells = <1>; + #size-cells = <1>; + }; + + gptu@E100A00 { + compatible = "lantiq,gptu-xway"; + reg = <0xE100A00 0x100>; + interrupt-parent = <&icu0>; + interrupts = <97 98 99 100 101 102>; + status = "disabled"; + }; + + gpio: pinmux@E100B10 { + compatible = "lantiq,pinctrl-ase"; + #gpio-cells = <2>; + gpio-controller; + reg = <0xE100B10 0xA0>; + }; + + serial@E100C00 { + compatible = "lantiq,asc"; + reg = <0xE100C00 0x400>; + interrupt-parent = <&icu0>; + interrupts = <72 74 75>; + }; + + mei@E116000 { + compatible = "lantiq,mei-xway"; + interrupt-parent = <&icu0>; + interrupts = <63>; + }; + + ifxhcd@E101000 { + compatible = "lantiq,ifxhcd-ase"; + reg = <0xE101000 0x1000 + 0xE120000 0x3f000>; + interrupt-parent = <&icu0>; + interrupts = <39>; + status = "disabled"; + }; + + dma0: dma@E104100 { + compatible = "lantiq,dma-xway"; + reg = <0xE104100 0x800>; + }; + + ebu0: ebu@E105300 { + compatible = "lantiq,ebu-xway"; + reg = <0xE105300 0x100>; + }; + + ppe@E234000 { + compatible = "lantiq,ppe-ase"; + interrupt-parent = <&icu0>; + interrupts = <85>; + }; + + etop@E180000 { + compatible = "lantiq,etop-xway"; + reg = <0xE180000 0x40000>; + interrupt-parent = <&icu0>; + interrupts = <105 109>; + }; + }; + + adsl { + compatible = "lantiq,adsl-ase"; + }; +}; |