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authorJohn Crispin <blogic@openwrt.org>2014-08-30 09:32:58 +0000
committerJohn Crispin <blogic@openwrt.org>2014-08-30 09:32:58 +0000
commita297ec8e13d10274155e0850228bb06c7648e541 (patch)
treea75e0d80b1664b748d679ea2e7f4797f58837703 /target/linux/ipq806x/patches/0143-ata-qcom-Add-device-tree-bindings-information.patch
parent9f7cb06591148e3698ac731f7b8734e4d3d21b33 (diff)
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ipq806x: Add support for IPQ806x chip family
Patches are generated using the "format-patch" command from the following location: *https://www.codeaurora.org/cgit/quic/kernel/galak-msm/log/?h=apq_ipq_base *rev=0771849495b4128cac2faf7d49c85c729fc48b20 Patches numbered 76/77/102/103 have already been integrated in 3.14.12, so they're not in this list. All these patches are either integrated are pending integration into kernel.org, therefore these patches should go away once the kernel gets upgraded to 3.16. Support is currently limited to AP148 board but can be extended to other platforms in the future. These changes do not cover ethernet connectivity. Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org> git-svn-id: svn://svn.openwrt.org/openwrt/trunk@42334 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/ipq806x/patches/0143-ata-qcom-Add-device-tree-bindings-information.patch')
-rw-r--r--target/linux/ipq806x/patches/0143-ata-qcom-Add-device-tree-bindings-information.patch63
1 files changed, 63 insertions, 0 deletions
diff --git a/target/linux/ipq806x/patches/0143-ata-qcom-Add-device-tree-bindings-information.patch b/target/linux/ipq806x/patches/0143-ata-qcom-Add-device-tree-bindings-information.patch
new file mode 100644
index 0000000000..ef795bf054
--- /dev/null
+++ b/target/linux/ipq806x/patches/0143-ata-qcom-Add-device-tree-bindings-information.patch
@@ -0,0 +1,63 @@
+From dd280a4cf6b826144f74d3fc4285633f1c337a1d Mon Sep 17 00:00:00 2001
+From: Kumar Gala <galak@codeaurora.org>
+Date: Thu, 12 Jun 2014 11:28:47 -0500
+Subject: [PATCH 143/182] ata: qcom: Add device tree bindings information
+
+Add device tree binding for Qualcomm AHCI SATA controller and specifically
+the sata controller on the IPQ806x family of SoCs.
+
+Signed-off-by: Kumar Gala <galak@codeaurora.org>
+---
+ .../devicetree/bindings/ata/qcom-sata.txt | 40 ++++++++++++++++++++
+ 1 file changed, 40 insertions(+)
+ create mode 100644 Documentation/devicetree/bindings/ata/qcom-sata.txt
+
+diff --git a/Documentation/devicetree/bindings/ata/qcom-sata.txt b/Documentation/devicetree/bindings/ata/qcom-sata.txt
+new file mode 100644
+index 0000000..5e74e41
+--- /dev/null
++++ b/Documentation/devicetree/bindings/ata/qcom-sata.txt
+@@ -0,0 +1,40 @@
++* Qualcomm AHCI SATA Controller
++
++SATA nodes are defined to describe on-chip Serial ATA controllers.
++Each SATA controller should have its own node.
++
++Required properties:
++- compatible : compatible list, contains "qcom,msm-ahci"
++- interrupts : <interrupt mapping for SATA IRQ>
++- reg : <registers mapping>
++- phys : Must contain exactly one entry as specified
++ in phy-bindings.txt
++- phy-names : Must be "sata-phy"
++
++Required properties for "qcom,ipq806x-ahci" compatible:
++- clocks : Must contain an entry for each entry in clock-names.
++- clock-names : Shall be:
++ "slave_iface" - Fabric port AHB clock for SATA
++ "iface" - AHB clock
++ "core" - core clock
++ "rxoob" - RX out-of-band clock
++ "pmalive" - Power Module Alive clock
++
++Example:
++ sata@29000000 {
++ compatible = "qcom,ipq806x-ahci", "qcom,msm-ahci";
++ reg = <0x29000000 0x180>;
++
++ interrupts = <0 209 0x0>;
++
++ clocks = <&gcc SFAB_SATA_S_H_CLK>,
++ <&gcc SATA_H_CLK>,
++ <&gcc SATA_A_CLK>,
++ <&gcc SATA_RXOOB_CLK>,
++ <&gcc SATA_PMALIVE_CLK>;
++ clock-names = "slave_iface", "iface", "core",
++ "rxoob", "pmalive";
++
++ phys = <&sata_phy>;
++ phy-names = "sata-phy";
++ };
+--
+1.7.10.4
+