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author | Felix Fietkau <nbd@openwrt.org> | 2015-11-21 10:54:53 +0000 |
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committer | Felix Fietkau <nbd@openwrt.org> | 2015-11-21 10:54:53 +0000 |
commit | 2507c77ce7b8692da83cb98fefd31144da304983 (patch) | |
tree | 9a124da24c2b630e9142070193898c092cd76725 /target/linux/ipq806x/patches-4.1/112-ARM-dts-qcom-add-pcie-nodes-to-ipq806x-platforms.patch | |
parent | 5f7f0b932123bcb8828a79e897bf8de5e44b4a08 (diff) | |
download | master-187ad058-2507c77ce7b8692da83cb98fefd31144da304983.tar.gz master-187ad058-2507c77ce7b8692da83cb98fefd31144da304983.tar.bz2 master-187ad058-2507c77ce7b8692da83cb98fefd31144da304983.zip |
ipq806x: fix pcie tx0-term-offset setting
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@47543 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/ipq806x/patches-4.1/112-ARM-dts-qcom-add-pcie-nodes-to-ipq806x-platforms.patch')
-rw-r--r-- | target/linux/ipq806x/patches-4.1/112-ARM-dts-qcom-add-pcie-nodes-to-ipq806x-platforms.patch | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/target/linux/ipq806x/patches-4.1/112-ARM-dts-qcom-add-pcie-nodes-to-ipq806x-platforms.patch b/target/linux/ipq806x/patches-4.1/112-ARM-dts-qcom-add-pcie-nodes-to-ipq806x-platforms.patch index 3fbcc395e0..d80bc8f209 100644 --- a/target/linux/ipq806x/patches-4.1/112-ARM-dts-qcom-add-pcie-nodes-to-ipq806x-platforms.patch +++ b/target/linux/ipq806x/patches-4.1/112-ARM-dts-qcom-add-pcie-nodes-to-ipq806x-platforms.patch @@ -40,7 +40,7 @@ Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org> spi_pins: spi_pins { mux { pins = "gpio18", "gpio19", "gpio21"; -@@ -91,5 +109,19 @@ +@@ -91,5 +109,21 @@ sata@29000000 { status = "ok"; }; @@ -50,6 +50,7 @@ Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org> + reset-gpio = <&qcom_pinmux 3 0>; + pinctrl-0 = <&pcie0_pins>; + pinctrl-names = "default"; ++ phy-tx0-term-offset = <7>; + }; + + pcie1: pci@1b700000 { @@ -57,6 +58,7 @@ Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org> + reset-gpio = <&qcom_pinmux 48 0>; + pinctrl-0 = <&pcie1_pins>; + pinctrl-names = "default"; ++ phy-tx0-term-offset = <7>; + }; }; }; |