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| author | Felix Fietkau <nbd@openwrt.org> | 2015-08-04 23:09:55 +0000 |
|---|---|---|
| committer | Felix Fietkau <nbd@openwrt.org> | 2015-08-04 23:09:55 +0000 |
| commit | c3739df7a176ccbbe518dba956aef68120373c0d (patch) | |
| tree | f925120f2daa5fa0593a0a0d3ba28a44de70e8c4 /target/linux/ipq806x/patches-3.18/707-ARM-dts-qcom-add-mdio-nodes-to-ap148-db149.patch | |
| parent | 7e19de8c17c90cb29db0ea88d71daeb99c9389e6 (diff) | |
| download | master-187ad058-c3739df7a176ccbbe518dba956aef68120373c0d.tar.gz master-187ad058-c3739df7a176ccbbe518dba956aef68120373c0d.tar.bz2 master-187ad058-c3739df7a176ccbbe518dba956aef68120373c0d.zip | |
ipq806x: fix pcie pinmux naming in ipq806x dts
PCIe controller nodes are numbers 0/1/2 in the chipset dtsi file, but
the pinmux nodes are numbers 1/2/3. We'll make it consistent by changing
the pinmux numbering to match the controller's one.
Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@46556 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/ipq806x/patches-3.18/707-ARM-dts-qcom-add-mdio-nodes-to-ap148-db149.patch')
| -rw-r--r-- | target/linux/ipq806x/patches-3.18/707-ARM-dts-qcom-add-mdio-nodes-to-ap148-db149.patch | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/target/linux/ipq806x/patches-3.18/707-ARM-dts-qcom-add-mdio-nodes-to-ap148-db149.patch b/target/linux/ipq806x/patches-3.18/707-ARM-dts-qcom-add-mdio-nodes-to-ap148-db149.patch index 809d74372b..851682a9aa 100644 --- a/target/linux/ipq806x/patches-3.18/707-ARM-dts-qcom-add-mdio-nodes-to-ap148-db149.patch +++ b/target/linux/ipq806x/patches-3.18/707-ARM-dts-qcom-add-mdio-nodes-to-ap148-db149.patch @@ -11,7 +11,7 @@ Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org> --- a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts +++ b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts -@@ -14,8 +14,9 @@ +@@ -19,8 +19,9 @@ }; }; @@ -22,7 +22,7 @@ Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org> }; chosen { -@@ -54,6 +55,15 @@ +@@ -59,6 +60,15 @@ bias-none; }; }; @@ -38,8 +38,8 @@ Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org> }; gsbi@16300000 { -@@ -163,5 +173,33 @@ - pinctrl-0 = <&pcie2_pins>; +@@ -168,5 +178,33 @@ + pinctrl-0 = <&pcie1_pins>; pinctrl-names = "default"; }; + @@ -99,7 +99,7 @@ Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org> gsbi2: gsbi@12480000 { @@ -173,5 +183,44 @@ - pinctrl-0 = <&pcie3_pins>; + pinctrl-0 = <&pcie2_pins>; pinctrl-names = "default"; }; + |