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author | Luka Perkov <luka@openwrt.org> | 2015-12-28 04:55:48 +0000 |
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committer | Luka Perkov <luka@openwrt.org> | 2015-12-28 04:55:48 +0000 |
commit | 57375463e98d30710a97ca657e13b63531887bed (patch) | |
tree | 2cb750ff3de563cf6ec31bde28f80a082c64f19d /target/linux/imx6 | |
parent | c55939ecba1f7d9d6549b3ac372ec70ac5a3b677 (diff) | |
download | master-187ad058-57375463e98d30710a97ca657e13b63531887bed.tar.gz master-187ad058-57375463e98d30710a97ca657e13b63531887bed.tar.bz2 master-187ad058-57375463e98d30710a97ca657e13b63531887bed.zip |
imx6: ventana: add ecspi3 host controller for GW52xx
Certain board revisions of the GW52xx support an SPI host controller with
a single chip-select going to an off board connector.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Pushpal Sidhu <psidhu@gateworks.com>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@48009 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/imx6')
-rw-r--r-- | target/linux/imx6/patches-4.3/041-ARM-dts-imx-ventana-add-spi-support-for-gw52xx.patch | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/target/linux/imx6/patches-4.3/041-ARM-dts-imx-ventana-add-spi-support-for-gw52xx.patch b/target/linux/imx6/patches-4.3/041-ARM-dts-imx-ventana-add-spi-support-for-gw52xx.patch new file mode 100644 index 0000000000..a0fb48ee8c --- /dev/null +++ b/target/linux/imx6/patches-4.3/041-ARM-dts-imx-ventana-add-spi-support-for-gw52xx.patch @@ -0,0 +1,35 @@ +Index: linux-4.3/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi +=================================================================== +--- linux-4.3.orig/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi 2015-12-18 10:39:44.899158318 -0800 ++++ linux-4.3/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi 2015-12-18 10:43:27.000000000 -0800 +@@ -158,6 +158,14 @@ + <&clks IMX6QDL_CLK_PLL3_USB_OTG>; + }; + ++&ecspi3 { ++ fsl,spi-num-chipselects = <1>; ++ cs-gpios = <&gpio4 24 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_ecspi3>; ++ status = "okay"; ++}; ++ + &fec { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet>; +@@ -357,6 +365,15 @@ + >; + }; + ++ pinctrl_ecspi3: escpi3grp { ++ fsl,pins = < ++ MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1 ++ MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1 ++ MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x100b1 ++ MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x100b1 ++ >; ++ }; ++ + pinctrl_enet: enetgrp { + fsl,pins = < + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 |