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author | Felix Fietkau <nbd@openwrt.org> | 2016-01-15 15:18:18 +0000 |
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committer | Felix Fietkau <nbd@openwrt.org> | 2016-01-15 15:18:18 +0000 |
commit | a0720b558c3e2005c4573ea7b04586f078121541 (patch) | |
tree | b999a772126ae5335fce9d18aecc5c8d79f05440 /target/linux/imx6/patches-4.4/041-ARM-dts-imx-ventana-add-spi-support-for-gw52xx.patch | |
parent | 2144c554b6ee2947d80fdcccb33a00cff546bfad (diff) | |
download | master-187ad058-a0720b558c3e2005c4573ea7b04586f078121541.tar.gz master-187ad058-a0720b558c3e2005c4573ea7b04586f078121541.tar.bz2 master-187ad058-a0720b558c3e2005c4573ea7b04586f078121541.zip |
imx6: add 4.4 support
Build and boot tested on the following hardware:
* GW54xx
* GW53xx
* GW52xx
* GW51xx
* GW552x
* GW551x
Signed-off-by: Pushpal Sidhu <psidhu@gateworks.com>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@48248 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/imx6/patches-4.4/041-ARM-dts-imx-ventana-add-spi-support-for-gw52xx.patch')
-rw-r--r-- | target/linux/imx6/patches-4.4/041-ARM-dts-imx-ventana-add-spi-support-for-gw52xx.patch | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/target/linux/imx6/patches-4.4/041-ARM-dts-imx-ventana-add-spi-support-for-gw52xx.patch b/target/linux/imx6/patches-4.4/041-ARM-dts-imx-ventana-add-spi-support-for-gw52xx.patch new file mode 100644 index 0000000000..da3571559e --- /dev/null +++ b/target/linux/imx6/patches-4.4/041-ARM-dts-imx-ventana-add-spi-support-for-gw52xx.patch @@ -0,0 +1,33 @@ +--- a/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi ++++ b/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi +@@ -158,6 +158,14 @@ + <&clks IMX6QDL_CLK_PLL3_USB_OTG>; + }; + ++&ecspi3 { ++ fsl,spi-num-chipselects = <1>; ++ cs-gpios = <&gpio4 24 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_ecspi3>; ++ status = "okay"; ++}; ++ + &fec { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet>; +@@ -357,6 +365,15 @@ + >; + }; + ++ pinctrl_ecspi3: escpi3grp { ++ fsl,pins = < ++ MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1 ++ MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1 ++ MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x100b1 ++ MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x100b1 ++ >; ++ }; ++ + pinctrl_enet: enetgrp { + fsl,pins = < + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 |