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author | Florian Fainelli <florian@openwrt.org> | 2010-08-22 17:08:37 +0000 |
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committer | Florian Fainelli <florian@openwrt.org> | 2010-08-22 17:08:37 +0000 |
commit | 7a32d5d9e311b422a29ac138266a72aeb981c49d (patch) | |
tree | 048813cefa7eb429697c3f441b8a854459b91671 /target/linux/brcm47xx/patches-2.6.34/700-ssb-gigabit-ethernet-driver.patch | |
parent | 4b4be29af21c7467c3c33bde8b8bf350cb33659e (diff) | |
download | master-187ad058-7a32d5d9e311b422a29ac138266a72aeb981c49d.tar.gz master-187ad058-7a32d5d9e311b422a29ac138266a72aeb981c49d.tar.bz2 master-187ad058-7a32d5d9e311b422a29ac138266a72aeb981c49d.zip |
[kernel] update to 2.6.34.5
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@22768 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/brcm47xx/patches-2.6.34/700-ssb-gigabit-ethernet-driver.patch')
-rw-r--r-- | target/linux/brcm47xx/patches-2.6.34/700-ssb-gigabit-ethernet-driver.patch | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/target/linux/brcm47xx/patches-2.6.34/700-ssb-gigabit-ethernet-driver.patch b/target/linux/brcm47xx/patches-2.6.34/700-ssb-gigabit-ethernet-driver.patch index 05fa0c7f99..bf6ffedbb3 100644 --- a/target/linux/brcm47xx/patches-2.6.34/700-ssb-gigabit-ethernet-driver.patch +++ b/target/linux/brcm47xx/patches-2.6.34/700-ssb-gigabit-ethernet-driver.patch @@ -8,7 +8,7 @@ #include <net/checksum.h> #include <net/ip.h> -@@ -471,8 +472,9 @@ static void _tw32_flush(struct tg3 *tp, +@@ -471,8 +472,9 @@ static void _tw32_flush(struct tg3 *tp, static inline void tw32_mailbox_flush(struct tg3 *tp, u32 off, u32 val) { tp->write32_mbox(tp, off, val); @@ -61,7 +61,7 @@ { u32 frame_val; unsigned int loops; -@@ -848,7 +855,7 @@ static int tg3_writephy(struct tg3 *tp, +@@ -848,7 +855,7 @@ static int tg3_writephy(struct tg3 *tp, udelay(80); } @@ -70,7 +70,7 @@ MI_COM_PHY_ADDR_MASK); frame_val |= ((reg << MI_COM_REG_ADDR_SHIFT) & MI_COM_REG_ADDR_MASK); -@@ -881,6 +888,11 @@ static int tg3_writephy(struct tg3 *tp, +@@ -881,6 +888,11 @@ static int tg3_writephy(struct tg3 *tp, return ret; } @@ -147,7 +147,7 @@ tw32(GRC_MODE, tp->grc_mode); if (tp->pci_chip_rev_id == CHIPREV_ID_5705_A0) { -@@ -7135,9 +7173,12 @@ static int tg3_halt_cpu(struct tg3 *tp, +@@ -7135,9 +7173,12 @@ static int tg3_halt_cpu(struct tg3 *tp, return -ENODEV; } @@ -175,7 +175,7 @@ fw_data = (void *)tp->fw->data; /* Firmware blob starts with version numbers, followed by -@@ -7256,6 +7302,11 @@ static int tg3_load_tso_firmware(struct +@@ -7256,6 +7302,11 @@ static int tg3_load_tso_firmware(struct unsigned long cpu_base, cpu_scratch_base, cpu_scratch_size; int err, i; @@ -242,7 +242,7 @@ tw32_f(GRC_EEPROM_ADDR, (EEPROM_ADDR_FSM_RESET | (EEPROM_DEFAULT_CLOCK_PERIOD << -@@ -12020,6 +12087,9 @@ static int tg3_nvram_write_block(struct +@@ -12020,6 +12087,9 @@ static int tg3_nvram_write_block(struct { int ret; |