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| author | Gabor Juhos <juhosg@openwrt.org> | 2012-10-28 19:52:02 +0000 |
|---|---|---|
| committer | Gabor Juhos <juhosg@openwrt.org> | 2012-10-28 19:52:02 +0000 |
| commit | a8ec452c60ed3281e29de6fa012f4940b4c3fbc3 (patch) | |
| tree | 81e47efe735c4cde24370d77b47e0ab60a84c197 /target/linux/ar71xx/patches-3.6/166-MIPS-ath79-register-UART-for-the-QCA955X-SoCs.patch | |
| parent | b783fb21a53535cf043189b0c4c30f315f494bb5 (diff) | |
| download | master-187ad058-a8ec452c60ed3281e29de6fa012f4940b4c3fbc3.tar.gz master-187ad058-a8ec452c60ed3281e29de6fa012f4940b4c3fbc3.tar.bz2 master-187ad058-a8ec452c60ed3281e29de6fa012f4940b4c3fbc3.zip | |
ar71xx: add initial support for 3.6
The nand subtarget is not working yet.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@33983 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/ar71xx/patches-3.6/166-MIPS-ath79-register-UART-for-the-QCA955X-SoCs.patch')
| -rw-r--r-- | target/linux/ar71xx/patches-3.6/166-MIPS-ath79-register-UART-for-the-QCA955X-SoCs.patch | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/target/linux/ar71xx/patches-3.6/166-MIPS-ath79-register-UART-for-the-QCA955X-SoCs.patch b/target/linux/ar71xx/patches-3.6/166-MIPS-ath79-register-UART-for-the-QCA955X-SoCs.patch new file mode 100644 index 0000000000..aacb8bbeb0 --- /dev/null +++ b/target/linux/ar71xx/patches-3.6/166-MIPS-ath79-register-UART-for-the-QCA955X-SoCs.patch @@ -0,0 +1,22 @@ +From f7d7b362b51c51c1ae80bb7ade2039d6f74d4070 Mon Sep 17 00:00:00 2001 +From: Gabor Juhos <juhosg@openwrt.org> +Date: Sun, 24 Jun 2012 13:46:26 +0200 +Subject: [PATCH 22/34] MIPS: ath79: register UART for the QCA955X SoCs + +Signed-off-by: Gabor Juhos <juhosg@openwrt.org> +--- + arch/mips/ath79/dev-common.c | 3 ++- + 1 files changed, 2 insertions(+), 1 deletions(-) + +--- a/arch/mips/ath79/dev-common.c ++++ b/arch/mips/ath79/dev-common.c +@@ -90,7 +90,8 @@ void __init ath79_register_uart(void) + if (soc_is_ar71xx() || + soc_is_ar724x() || + soc_is_ar913x() || +- soc_is_ar934x()) { ++ soc_is_ar934x() || ++ soc_is_qca955x()) { + ath79_uart_data[0].uartclk = clk_get_rate(clk); + platform_device_register(&ath79_uart_device); + } else if (soc_is_ar933x()) { |