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author | Gabor Juhos <juhosg@openwrt.org> | 2008-11-26 20:00:41 +0000 |
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committer | Gabor Juhos <juhosg@openwrt.org> | 2008-11-26 20:00:41 +0000 |
commit | 31ecd080e3ab771813abc400fbb429be7758b416 (patch) | |
tree | ddc6afd4848b31cdcabf6123a2b911aa10ae71f8 /target/linux/ar71xx/files/drivers | |
parent | 7813d1dd295fb19ce6b8894b9b435a3cf32ea3f4 (diff) | |
download | master-187ad058-31ecd080e3ab771813abc400fbb429be7758b416.tar.gz master-187ad058-31ecd080e3ab771813abc400fbb429be7758b416.tar.bz2 master-187ad058-31ecd080e3ab771813abc400fbb429be7758b416.zip |
[ar71xx] ag71xx: introduce SoC specific fuctions for DDR flush and PLL setup
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@13369 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/ar71xx/files/drivers')
3 files changed, 9 insertions, 46 deletions
diff --git a/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx.h b/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx.h index f7865523c3..06ec3c3bf6 100644 --- a/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx.h +++ b/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx.h @@ -37,7 +37,7 @@ #define ETH_FCS_LEN 4 #define AG71XX_DRV_NAME "ag71xx" -#define AG71XX_DRV_VERSION "0.4.4" +#define AG71XX_DRV_VERSION "0.5.0" #define AG71XX_NAPI_TX 1 @@ -331,6 +331,8 @@ static inline u32 ag71xx_rr(struct ag71xx *ag, unsigned reg) reg -= AG71XX_REG_MAC_IFCTL; ret = __raw_readl(ag->mac_base2 + reg); break; + default: + BUG(); } return ret; diff --git a/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx_main.c b/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx_main.c index 47fc674077..3d60a8bab6 100644 --- a/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx_main.c +++ b/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx_main.c @@ -384,7 +384,7 @@ static int ag71xx_hard_start_xmit(struct sk_buff *skb, struct net_device *dev) desc = &ring->descs[i]; spin_lock_irqsave(&ag->lock, flags); - ar71xx_ddr_flush(pdata->flush_reg); + pdata->ddr_flush(); spin_unlock_irqrestore(&ag->lock, flags); if (!ag71xx_desc_empty(desc)) @@ -480,7 +480,7 @@ static void ag71xx_tx_packets(struct ag71xx *ag) DBG("%s: processing TX ring\n", ag->dev->name); #ifdef AG71XX_NAPI_TX - ar71xx_ddr_flush(pdata->flush_reg); + pdata->ddr_flush(); #endif sent = 0; @@ -523,7 +523,7 @@ static int ag71xx_rx_packets(struct ag71xx *ag, int limit) #ifndef AG71XX_NAPI_TX spin_lock_irqsave(&ag->lock, flags); - ar71xx_ddr_flush(pdata->flush_reg); + pdata->ddr_flush(); spin_unlock_irqrestore(&ag->lock, flags); #endif @@ -592,7 +592,7 @@ static int ag71xx_poll(struct napi_struct *napi, int limit) int done; #ifdef AG71XX_NAPI_TX - ar71xx_ddr_flush(pdata->flush_reg); + pdata->ddr_flush(); ag71xx_tx_packets(ag); #endif diff --git a/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx_phy.c b/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx_phy.c index 9173b48ad5..cedbfe616b 100644 --- a/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx_phy.c +++ b/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx_phy.c @@ -13,46 +13,6 @@ #include "ag71xx.h" -#define PLL_SEC_CONFIG 0x18050004 -#define PLL_ETH0_INT_CLOCK 0x18050010 -#define PLL_ETH1_INT_CLOCK 0x18050014 -#define PLL_ETH_EXT_CLOCK 0x18050018 - -#define ag71xx_pll_shift(_ag) (((_ag)->pdev->id) ? 19 : 17) -#define ag71xx_pll_offset(_ag) (((_ag)->pdev->id) ? PLL_ETH1_INT_CLOCK \ - : PLL_ETH0_INT_CLOCK) - -static void ag71xx_set_pll(struct ag71xx *ag, u32 pll_val) -{ - void __iomem *pll_reg = ioremap_nocache(ag71xx_pll_offset(ag), 4); - void __iomem *pll_cfg = ioremap_nocache(PLL_SEC_CONFIG, 4); - u32 s; - u32 t; - - s = ag71xx_pll_shift(ag); - - t = __raw_readl(pll_cfg); - t &= ~(3 << s); - t |= (2 << s); - __raw_writel(t, pll_cfg); - udelay(100); - - __raw_writel(pll_val, pll_reg); - - t |= (3 << s); - __raw_writel(t, pll_cfg); - udelay(100); - - t &= ~(3 << s); - __raw_writel(t, pll_cfg); - udelay(100); - DBG("%s: pll_reg %#x: %#x\n", ag->dev->name, - (unsigned int)pll_reg, __raw_readl(pll_reg)); - - iounmap(pll_cfg); - iounmap(pll_reg); -} - static unsigned char *ag71xx_speed_str(struct ag71xx *ag) { switch (ag->speed) { @@ -79,6 +39,7 @@ static unsigned char *ag71xx_speed_str(struct ag71xx *ag) static void ag71xx_phy_link_update(struct ag71xx *ag) { + struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag); u32 cfg2; u32 ifctl; u32 pll; @@ -126,7 +87,7 @@ static void ag71xx_phy_link_update(struct ag71xx *ag) } ag71xx_wr(ag, AG71XX_REG_FIFO_CFG3, 0x008001ff); - ag71xx_set_pll(ag, pll); + pdata->set_pll(pll); ag71xx_mii_ctrl_set_speed(ag, mii_speed); ag71xx_wr(ag, AG71XX_REG_MAC_CFG2, cfg2); |