diff options
| author | Felix Fietkau <nbd@openwrt.org> | 2013-02-11 18:59:05 +0000 |
|---|---|---|
| committer | Felix Fietkau <nbd@openwrt.org> | 2013-02-11 18:59:05 +0000 |
| commit | 069528fb36bb66947f6592463876d83c22b896b7 (patch) | |
| tree | 5d5db0a0153595355a156fc051fabf6e099c00f7 /target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_ar7240.c | |
| parent | aa1758313e397d3607e8bd692a3cf58ce50f680a (diff) | |
| download | master-187ad058-069528fb36bb66947f6592463876d83c22b896b7.tar.gz master-187ad058-069528fb36bb66947f6592463876d83c22b896b7.tar.bz2 master-187ad058-069528fb36bb66947f6592463876d83c22b896b7.zip | |
ar71xx: allow unknown multicast frames to pass to the CPU on AR934x
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@35564 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_ar7240.c')
| -rw-r--r-- | target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_ar7240.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_ar7240.c b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_ar7240.c index 49f077520b..21140106cb 100644 --- a/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_ar7240.c +++ b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_ar7240.c @@ -209,6 +209,7 @@ #define AR934X_REG_OPER_MODE1_PHY4_MII_EN BIT(28) #define AR934X_REG_FLOOD_MASK 0x2c +#define AR934X_FLOOD_MASK_MC_DP(_p) BIT(16 + (_p)) #define AR934X_FLOOD_MASK_BC_DP(_p) BIT(25 + (_p)) #define AR934X_REG_QM_CTRL 0x3c @@ -580,9 +581,10 @@ static void ar7240sw_setup(struct ar7240sw *as) /* Enable ARP frame acknowledge */ ar7240sw_reg_set(mii, AR934X_REG_QM_CTRL, AR934X_QM_CTRL_ARP_EN); - /* Enable Broadcast frames transmitted to the CPU */ + /* Enable Broadcast/Multicast frames transmitted to the CPU */ ar7240sw_reg_set(mii, AR934X_REG_FLOOD_MASK, - AR934X_FLOOD_MASK_BC_DP(0)); + AR934X_FLOOD_MASK_BC_DP(0) | + AR934X_FLOOD_MASK_MC_DP(0)); /* Enable MIB counters */ ar7240sw_reg_set(mii, AR7240_REG_MIB_FUNCTION0, |