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| author | Gabor Juhos <juhosg@openwrt.org> | 2008-11-26 17:17:13 +0000 |
|---|---|---|
| committer | Gabor Juhos <juhosg@openwrt.org> | 2008-11-26 17:17:13 +0000 |
| commit | a0db668dea0071a5a8931fbecbf33b577fc732d7 (patch) | |
| tree | eb5e5d3e8abfab3842bf851fed8df7ea3707af20 /target/linux/ar71xx/files/arch/mips/pci | |
| parent | 8d9ff98b67cdd0d551acefa4310ffbcc0374809e (diff) | |
| download | master-187ad058-a0db668dea0071a5a8931fbecbf33b577fc732d7.tar.gz master-187ad058-a0db668dea0071a5a8931fbecbf33b577fc732d7.tar.bz2 master-187ad058-a0db668dea0071a5a8931fbecbf33b577fc732d7.zip | |
[ar71xx] rename DDR registers
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@13363 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/ar71xx/files/arch/mips/pci')
| -rw-r--r-- | target/linux/ar71xx/files/arch/mips/pci/pci-ar71xx.c | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/target/linux/ar71xx/files/arch/mips/pci/pci-ar71xx.c b/target/linux/ar71xx/files/arch/mips/pci/pci-ar71xx.c index f27c171a63..383a708b8c 100644 --- a/target/linux/ar71xx/files/arch/mips/pci/pci-ar71xx.c +++ b/target/linux/ar71xx/files/arch/mips/pci/pci-ar71xx.c @@ -316,14 +316,14 @@ static int __init __ar71xx_pci_bios_init(unsigned nr_irqs, ar71xx_pcicfg_base = ioremap_nocache(AR71XX_PCI_CFG_BASE, AR71XX_PCI_CFG_SIZE); - ar71xx_ddr_wr(DDR_REG_PCI_WIN0, PCI_WIN0_OFFS); - ar71xx_ddr_wr(DDR_REG_PCI_WIN1, PCI_WIN1_OFFS); - ar71xx_ddr_wr(DDR_REG_PCI_WIN2, PCI_WIN2_OFFS); - ar71xx_ddr_wr(DDR_REG_PCI_WIN3, PCI_WIN3_OFFS); - ar71xx_ddr_wr(DDR_REG_PCI_WIN4, PCI_WIN4_OFFS); - ar71xx_ddr_wr(DDR_REG_PCI_WIN5, PCI_WIN5_OFFS); - ar71xx_ddr_wr(DDR_REG_PCI_WIN6, PCI_WIN6_OFFS); - ar71xx_ddr_wr(DDR_REG_PCI_WIN7, PCI_WIN7_OFFS); + ar71xx_ddr_wr(AR71XX_DDR_REG_PCI_WIN0, PCI_WIN0_OFFS); + ar71xx_ddr_wr(AR71XX_DDR_REG_PCI_WIN1, PCI_WIN1_OFFS); + ar71xx_ddr_wr(AR71XX_DDR_REG_PCI_WIN2, PCI_WIN2_OFFS); + ar71xx_ddr_wr(AR71XX_DDR_REG_PCI_WIN3, PCI_WIN3_OFFS); + ar71xx_ddr_wr(AR71XX_DDR_REG_PCI_WIN4, PCI_WIN4_OFFS); + ar71xx_ddr_wr(AR71XX_DDR_REG_PCI_WIN5, PCI_WIN5_OFFS); + ar71xx_ddr_wr(AR71XX_DDR_REG_PCI_WIN6, PCI_WIN6_OFFS); + ar71xx_ddr_wr(AR71XX_DDR_REG_PCI_WIN7, PCI_WIN7_OFFS); ar71xx_pci_delay(); |