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| author | John Crispin <blogic@openwrt.org> | 2011-10-10 15:14:17 +0000 |
|---|---|---|
| committer | John Crispin <blogic@openwrt.org> | 2011-10-10 15:14:17 +0000 |
| commit | d504175233010ec8b3431ca3f18c7d3760ee4993 (patch) | |
| tree | c744550c4eb70b0a99eeee97ad19b8f914d40fdc /package/ltq-dsl/src/ifxmips_atm_ppe_danube.h | |
| parent | 4cc422e0f3860fbe49957352cfb7cd61e5e884d3 (diff) | |
| download | master-187ad058-d504175233010ec8b3431ca3f18c7d3760ee4993.tar.gz master-187ad058-d504175233010ec8b3431ca3f18c7d3760ee4993.tar.bz2 master-187ad058-d504175233010ec8b3431ca3f18c7d3760ee4993.zip | |
[ltq-dsl]
* add support for ar9
* add support for ase
(vr9 support is still a todo)
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@28406 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'package/ltq-dsl/src/ifxmips_atm_ppe_danube.h')
| -rw-r--r-- | package/ltq-dsl/src/ifxmips_atm_ppe_danube.h | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/package/ltq-dsl/src/ifxmips_atm_ppe_danube.h b/package/ltq-dsl/src/ifxmips_atm_ppe_danube.h index 34cf877051..7e46cc1838 100644 --- a/package/ltq-dsl/src/ifxmips_atm_ppe_danube.h +++ b/package/ltq-dsl/src/ifxmips_atm_ppe_danube.h @@ -1,3 +1,30 @@ +/****************************************************************************** +** +** FILE NAME : ifxmips_atm_ppe_danube.h +** PROJECT : UEIP +** MODULES : ATM (ADSL) +** +** DATE : 1 AUG 2005 +** AUTHOR : Xu Liang +** DESCRIPTION : ATM Driver (PPE Registers) +** COPYRIGHT : Copyright (c) 2006 +** Infineon Technologies AG +** Am Campeon 1-12, 85579 Neubiberg, Germany +** +** This program is free software; you can redistribute it and/or modify +** it under the terms of the GNU General Public License as published by +** the Free Software Foundation; either version 2 of the License, or +** (at your option) any later version. +** +** HISTORY +** $Date $Author $Comment +** 4 AUG 2005 Xu Liang Initiate Version +** 23 OCT 2006 Xu Liang Add GPL header. +** 9 JAN 2007 Xu Liang First version got from Anand (IC designer) +*******************************************************************************/ + + + #ifndef IFXMIPS_ATM_PPE_DANUBE_H #define IFXMIPS_ATM_PPE_DANUBE_H @@ -76,6 +103,8 @@ #define PP32_DBG_TASK_NO PP32_DEBUG_REG_ADDR(0, 0x0081) +#define PP32_DBG_REG_BASE(tsk, i) PP32_DEBUG_REG_ADDR(0, 0x0100 + (tsk) * 16 + (i)) + /* * EMA Registers */ |