firmware: create a new folder for holfing firmware blobs

Signed-off-by: John Crispin <blogic@openwrt.org>

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@40307 3c298f89-4303-0410-b956-a3cf2f4a3e73

6 files changed, 388 insertions, 0 deletions

diff --git a/package/firmware/am33x-cm3/Makefile b/package/firmware/am33x-cm3/Makefile
new file mode 100644
index 0000000000..bd7e2ae536
--- /dev/null
+++ b/package/firmware/am33x-cm3/Makefile
@@ -0,0 +1,42 @@
+#
+# Copyright (C) 2014 OpenWrt.org
+#
+# This is free software, licensed under the GNU General Public License v2.
+# See /LICENSE for more information.
+#
+
+include $(TOPDIR)/rules.mk
+
+PKG_NAME:=am33x-cm3
+PKG_VERSION:=20130304
+PKG_RELEASE:=1
+
+PKG_SOURCE_PROTO:=git
+PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2
+PKG_SOURCE_SUBDIR:=$(PKG_NAME)-$(PKG_VERSION)
+PKG_SOURCE_URL:=git://arago-project.org/git/projects/am33x-cm3.git
+PKG_SOURCE_VERSION:=32cf44e25b5828b87af6dceebc3a49fed5d858ac
+PKG_MD5SUM:=40a6b7edae5e5cfff99bebde2bf20b97
+
+PKG_MAINTAINER:=Imre Kaloz <kaloz@openwrt.org>
+
+include $(INCLUDE_DIR)/package.mk
+
+define Package/am33x-cm3
+  SECTION:=firmware
+  CATEGORY:=Firmware
+  URL:=http://arago-project.org/git/projects/?p=am33x-cm3.git
+  TITLE:=TI AM335x PM firmware
+  DEPENDS:=@TARGET_omap
+endef
+
+define Build/Compile
+	$(MAKE) CROSS_COMPILE=$(TARGET_CROSS) -C $(PKG_BUILD_DIR)
+endef
+
+define Package/am33x-cm3/install
+	$(INSTALL_DIR) $(1)/lib/firmware
+	$(CP) $(PKG_BUILD_DIR)/bin/am335x-pm-firmware.bin $(1)/lib/firmware
+endef
+
+$(eval $(call BuildPackage,am33x-cm3))
diff --git a/package/firmware/ixp4xx-microcode/Makefile b/package/firmware/ixp4xx-microcode/Makefile
new file mode 100644
index 0000000000..52b44f35f9
--- /dev/null
+++ b/package/firmware/ixp4xx-microcode/Makefile
@@ -0,0 +1,57 @@
+# 
+# Copyright (C) 2007 OpenWrt.org
+#
+# This is free software, licensed under the GNU General Public License v2.
+# See /LICENSE for more information.
+#
+
+include $(TOPDIR)/rules.mk
+
+PKG_NAME:=ixp4xx-microcode
+PKG_VERSION:=2.4
+PKG_RELEASE:=2
+
+PKG_SOURCE:=IPL_ixp400NpeLibraryWithCrypto-2_4.zip
+PKG_SOURCE_URL:=http://downloads.openwrt.org/sources
+PKG_MD5SUM:=dd5f6482e625ecb334469958bcd54b37
+
+include $(INCLUDE_DIR)/package.mk
+
+define Package/ixp4xx-microcode
+  SECTION:=net
+  CATEGORY:=Network
+  TITLE:=Microcode for the IXP4xx network engines
+  DEPENDS:=@TARGET_ixp4xx
+endef
+
+define Package/ixp4xx-microcode/description
+ This package contains the microcode needed to use the network engines in IXP4xx CPUs
+endef
+
+define Build/Prepare
+	rm -rf $(PKG_BUILD_DIR)
+	mkdir -p $(PKG_BUILD_DIR)
+	unzip -d $(PKG_BUILD_DIR)/ $(DL_DIR)/$(PKG_SOURCE)
+	mv $(PKG_BUILD_DIR)/ixp400_xscale_sw/src/npeDl/IxNpeMicrocode.c $(PKG_BUILD_DIR)/
+	rm -rf $(PKG_BUILD_DIR)/ixp400_xscale_sw
+	$(CP) ./src/* $(PKG_BUILD_DIR)/
+endef
+
+define Build/Compile
+	(cd $(PKG_BUILD_DIR); \
+		$(HOSTCC) -Wall -I$(STAGING_DIR_HOST)/include IxNpeMicrocode.c -o IxNpeMicrocode; \
+		./IxNpeMicrocode -be \
+	)
+endef
+
+define Package/ixp4xx-microcode/install
+	$(INSTALL_DIR) $(1)/lib/firmware
+	$(INSTALL_DIR) $(1)/usr/share/doc
+	$(INSTALL_BIN) $(PKG_BUILD_DIR)/NPE-A $(1)/lib/firmware/
+	$(INSTALL_BIN) $(PKG_BUILD_DIR)/NPE-A-HSS $(1)/lib/firmware/
+	$(INSTALL_BIN) $(PKG_BUILD_DIR)/NPE-B $(1)/lib/firmware/
+	$(INSTALL_BIN) $(PKG_BUILD_DIR)/NPE-C $(1)/lib/firmware/
+	$(INSTALL_DATA) $(PKG_BUILD_DIR)/LICENSE.IPL $(1)/usr/share/doc/
+endef
+
+$(eval $(call BuildPackage,ixp4xx-microcode))
diff --git a/package/firmware/ixp4xx-microcode/src/IxNpeMicrocode.h b/package/firmware/ixp4xx-microcode/src/IxNpeMicrocode.h
new file mode 100644
index 0000000000..4a843db104
--- /dev/null
+++ b/package/firmware/ixp4xx-microcode/src/IxNpeMicrocode.h
@@ -0,0 +1,148 @@
+/*
+ * IxNpeMicrocode.h - Headerfile for compiling the Intel microcode C file
+ *
+ * Copyright (C) 2006 Christian Hohnstaedt <chohnstaedt@innominate.com>
+ *
+ * This file is released under the GPLv2
+ *
+ *
+ * compile with
+ *
+ * gcc -Wall IxNpeMicrocode.c -o IxNpeMicrocode
+ *
+ * Executing the resulting binary on your build-host creates the
+ * "NPE-[ABC].xxxxxxxx" files containing the selected microcode
+ *
+ * fetch the IxNpeMicrocode.c from the Intel Access Library.
+ * It will include this header.
+ *
+ * select Images for every NPE from the following
+ * (used C++ comments for easy uncommenting ....)
+ */
+
+// #define IX_NPEDL_NPEIMAGE_NPEA_ETH_SPAN_MASK_FIREWALL_VLAN_QOS_HDR_CONV_EXTMIB
+// #define IX_NPEDL_NPEIMAGE_NPEA_ETH_SPAN_VLAN_QOS_HDR_CONV_EXTMIB
+// #define IX_NPEDL_NPEIMAGE_NPEA_ETH_LEARN_FILTER_SPAN_MASK_FIREWALL_VLAN_QOS_EXTMIB
+// #define IX_NPEDL_NPEIMAGE_NPEA_HSS_TSLOT_SWITCH
+#define IX_NPEDL_NPEIMAGE_NPEA_ETH_SPAN_FIREWALL_VLAN_QOS_HDR_CONV
+// #define IX_NPEDL_NPEIMAGE_NPEA_ETH_LEARN_FILTER_SPAN_FIREWALL_VLAN_QOS
+// #define IX_NPEDL_NPEIMAGE_NPEA_ETH_LEARN_FILTER_SPAN_FIREWALL
+#define IX_NPEDL_NPEIMAGE_NPEA_HSS_2_PORT
+// #define IX_NPEDL_NPEIMAGE_NPEA_DMA
+// #define IX_NPEDL_NPEIMAGE_NPEA_ATM_MPHY_12_PORT
+// #define IX_NPEDL_NPEIMAGE_NPEA_HSS0_ATM_MPHY_1_PORT
+// #define IX_NPEDL_NPEIMAGE_NPEA_HSS0_ATM_SPHY_1_PORT
+// #define IX_NPEDL_NPEIMAGE_NPEA_HSS0
+// #define IX_NPEDL_NPEIMAGE_NPEA_WEP
+
+
+// #define IX_NPEDL_NPEIMAGE_NPEB_ETH_SPAN_MASK_FIREWALL_VLAN_QOS_HDR_CONV_EXTMIB
+// #define IX_NPEDL_NPEIMAGE_NPEB_ETH_SPAN_VLAN_QOS_HDR_CONV_EXTMIB
+// #define IX_NPEDL_NPEIMAGE_NPEB_ETH_LEARN_FILTER_SPAN_MASK_FIREWALL_VLAN_QOS_EXTMIB
+// #define IX_NPEDL_NPEIMAGE_NPEB_DMA
+#define IX_NPEDL_NPEIMAGE_NPEB_ETH_SPAN_FIREWALL_VLAN_QOS_HDR_CONV
+// #define IX_NPEDL_NPEIMAGE_NPEB_ETH_LEARN_FILTER_SPAN_FIREWALL_VLAN_QOS
+// #define IX_NPEDL_NPEIMAGE_NPEB_ETH_LEARN_FILTER_SPAN_FIREWALL
+
+
+// #define IX_NPEDL_NPEIMAGE_NPEC_ETH_SPAN_MASK_FIREWALL_VLAN_QOS_HDR_CONV_EXTMIB
+// #define IX_NPEDL_NPEIMAGE_NPEC_ETH_SPAN_VLAN_QOS_HDR_CONV_EXTMIB
+// #define IX_NPEDL_NPEIMAGE_NPEC_ETH_LEARN_FILTER_SPAN_MASK_FIREWALL_VLAN_QOS_EXTMIB
+// #define IX_NPEDL_NPEIMAGE_NPEC_DMA
+// #define IX_NPEDL_NPEIMAGE_NPEC_CRYPTO_AES_ETH_LEARN_FILTER_SPAN
+// #define IX_NPEDL_NPEIMAGE_NPEC_CRYPTO_AES_ETH_LEARN_FILTER_FIREWALL
+#define IX_NPEDL_NPEIMAGE_NPEC_CRYPTO_AES_CCM_ETH
+// #define IX_NPEDL_NPEIMAGE_NPEC_CRYPTO_AES_CCM_EXTSHA_ETH
+// #define IX_NPEDL_NPEIMAGE_NPEC_CRYPTO_ETH_LEARN_FILTER_SPAN_FIREWALL
+// #define IX_NPEDL_NPEIMAGE_NPEC_ETH_SPAN_FIREWALL_VLAN_QOS_HDR_CONV
+// #define IX_NPEDL_NPEIMAGE_NPEC_ETH_LEARN_FILTER_SPAN_FIREWALL_VLAN_QOS
+// #define IX_NPEDL_NPEIMAGE_NPEC_ETH_LEARN_FILTER_SPAN_FIREWALL
+
+
+#include <stdio.h>
+#include <unistd.h>
+#include <stdlib.h>
+#include <netinet/in.h>
+#include <sys/types.h>
+#include <sys/stat.h>
+#include <fcntl.h>
+#include <errno.h>
+#include <endian.h>
+#include <byteswap.h>
+#include <string.h>
+
+#if __BYTE_ORDER == __LITTLE_ENDIAN
+#define to_le32(x) (x)
+#define to_be32(x) bswap_32(x)
+#else
+#define to_be32(x) (x)
+#define to_le32(x) bswap_32(x)
+#endif
+
+struct dl_image {
+	unsigned magic;
+	unsigned id;
+	unsigned size;
+	unsigned data[0];
+};
+
+const unsigned IxNpeMicrocode_array[];
+
+int main(int argc, char *argv[])
+{
+	struct dl_image *image = (struct dl_image *)IxNpeMicrocode_array;
+	int imgsiz, i, fd, cnt;
+	const unsigned *arrayptr = IxNpeMicrocode_array;
+	const char *names[] = { "IXP425", "IXP465", "unknown" };
+	int bigendian = 1;
+
+	if (argc > 1) {
+		if (!strcmp(argv[1], "-le"))
+			bigendian = 0;
+		else if (!strcmp(argv[1], "-be"))
+			bigendian = 1;
+		else {
+			printf("Usage: %s <-le|-be>\n", argv[0]);
+			return EXIT_FAILURE;
+		}
+	}
+
+	for (image = (struct dl_image *)arrayptr, cnt=0;
+		(image->id != 0xfeedf00d) && (image->magic == 0xfeedf00d);
+		image = (struct dl_image *)(arrayptr), cnt++)
+	{
+		unsigned char field[4];
+		imgsiz = image->size + 3;
+		*(unsigned*)field = to_be32(image->id);
+		char filename[40], slnk[10];
+
+		sprintf(filename, "NPE-%c.%08x", (field[0] & 0xf) + 'A',
+			image->id);
+		if (image->id == 0x00090000)
+			sprintf(slnk, "NPE-%c-HSS", (field[0] & 0xf) + 'A');
+		else
+			sprintf(slnk, "NPE-%c", (field[0] & 0xf) + 'A');
+
+		printf("Writing image: %s.NPE_%c Func: %2x Rev: %02x.%02x "
+			"Size: %5d to: '%s'\n",
+			names[field[0] >> 4], (field[0] & 0xf) + 'A',
+			field[1], field[2], field[3], imgsiz*4, filename);
+		fd = open(filename, O_CREAT | O_RDWR | O_TRUNC, 0644);
+		if (fd >= 0) {
+			for (i=0; i<imgsiz; i++) {
+				*(unsigned*)field = bigendian ?
+					to_be32(arrayptr[i]) :
+					to_le32(arrayptr[i]);
+				write(fd, field, sizeof(field));
+			}
+			close(fd);
+			unlink(slnk);
+			symlink(filename, slnk);
+		} else {
+			perror(filename);
+		}
+		arrayptr += imgsiz;
+	}
+	close(fd);
+	return 0;
+}
diff --git a/package/firmware/ixp4xx-microcode/src/LICENSE.IPL b/package/firmware/ixp4xx-microcode/src/LICENSE.IPL
new file mode 100644
index 0000000000..dad2566cfc
--- /dev/null
+++ b/package/firmware/ixp4xx-microcode/src/LICENSE.IPL
@@ -0,0 +1,27 @@
+INTEL(R) SOFTWARE LICENSE AGREEMENT
+ 
+Copyright (c) 2007, Intel Corporation.
+All rights reserved.
+
+Redistribution. Redistribution and use in binary form, without modification, are permitted
+provided that the following conditions are met:
+o Redistributions must reproduce the above copyright notice and the following disclaimer in the
+documentation and/or other materials provided with the distribution. 
+o Neither the name of Intel Corporation nor the names of its suppliers may be used to endorse
+or promote products derived from this software without specific prior written permission. 
+o No reverse engineering, decompilation, or disassembly of this software is permitted.
+
+Limited patent license. Intel Corporation grants a world-wide, royalty-free, non-exclusive
+license under patents it now or hereafter owns or controls to make, have made, use, import,
+offer to sell and sell (.Utilize.) this software, but solely to the extent that any such patent is
+necessary to Utilize the software alone. The patent license shall not apply to any combinations
+which include this software. No hardware per se is licensed hereunder.
+DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+OF SUCH DAMAGE.
diff --git a/package/firmware/vsc73x5-ucode/Makefile b/package/firmware/vsc73x5-ucode/Makefile
new file mode 100644
index 0000000000..3a07121107
--- /dev/null
+++ b/package/firmware/vsc73x5-ucode/Makefile
@@ -0,0 +1,94 @@
+#
+# Copyright (C) 2010 OpenWrt.org
+#
+# This is free software, licensed under the GNU General Public License v2.
+# See /LICENSE for more information.
+#
+
+include $(TOPDIR)/rules.mk
+
+PKG_NAME:=vsc73x5-ucode
+PKG_RELEASE:=1
+
+PKG_SOURCE_URL:=http://mirror2.openwrt.org/sources
+
+PKG_SOURCE:=vsc73x5-ucode.tar.bz2
+PKG_BUILD_DIR:=$(BUILD_DIR)/vsc73x5-ucode
+
+PKG_MD5SUM:=b32e3debcd118f263c79199a7b5afa68
+
+include $(INCLUDE_DIR)/package.mk
+
+define Package/vsc73x5-defaults
+  SECTION:=net
+  CATEGORY:=Network
+  DEPENDS:=@TARGET_ar71xx
+  DEFAULT:=n
+  TITLE:=$(1)
+endef
+
+define Package/vsc73x5/install
+	$(INSTALL_DIR) $(1)/lib/firmware
+	$(INSTALL_DATA) $(PKG_BUILD_DIR)/$(2) $(1)/lib/firmware/$(3)
+endef
+
+define Package/vsc7385-ucode-ap83
+  $(call Package/vsc73x5-defaults,Vitesse VSC7385 microcode for the Atheros AP83 boards)
+endef
+
+define Package/vsc7385-ucode-ap83/description
+  This package contains the Atheros AP83 board specific microcode for
+  the Vitesse VSC7385 ethernet switch.
+endef
+
+define Package/vsc7385-ucode-ap83/install
+  $(call Package/vsc73x5/install,$(1),g5_Plus1_2_31_unmanaged_Atheros_v3.bin,vsc7385_ucode_ap83.bin)
+endef
+
+define Package/vsc7395-ucode-ap83
+  $(call Package/vsc73x5-defaults, Vitesse VSC7395 microcode for the Atheros AP83 boards)
+endef
+
+define Package/vsc7395-ucode-ap83/description
+  This package contains the Atheros AP83 board specific microcode for
+  the Vitesse VSC7395 ethernet switch.
+endef
+
+define Package/vsc7395-ucode-ap83/install
+  $(call Package/vsc73x5/install,$(1),g5_Plus1_2_31_unmanaged_Atheros_v4.bin,vsc7395_ucode_ap83.bin)
+endef
+
+define Package/vsc7385-ucode-pb44
+  $(call Package/vsc73x5-defaults, Vitesse VSC7395 microcode for the Atheros PB44 boards)
+endef
+
+define Package/vsc7385-ucode-pb44/description
+  This package contains the Atheros PB44 board specific microcode for
+  the Vitesse VSC7385 ethernet switch.
+endef
+
+define Package/vsc7385-ucode-pb44/install
+  $(call Package/vsc73x5/install,$(1),g5_Plus1_2_29b_unmanaged_Atheros_v5.bin,vsc7385_ucode_pb44.bin)
+endef
+
+define Package/vsc7395-ucode-pb44
+  $(call Package/vsc73x5-defaults, Vitesse VSC7395 microcode for the Atheros PB44 boards)
+endef
+
+define Package/vsc7395-ucode-pb44/description
+  This package contains the Atheros AP83 board specific microcode for
+  the Vitesse VSC7395 ethernet switch.
+endef
+
+define Package/vsc7395-ucode-pb44/install
+  $(call Package/vsc73x5/install,$(1),g5e_Plus1_2_29a_unmanaged_Atheros_v3.bin,vsc7395_ucode_pb44.bin)
+endef
+
+define Build/Compile
+
+endef
+
+$(eval $(call BuildPackage,vsc7385-ucode-ap83))
+$(eval $(call BuildPackage,vsc7395-ucode-ap83))
+$(eval $(call BuildPackage,vsc7385-ucode-pb44))
+$(eval $(call BuildPackage,vsc7395-ucode-pb44))
diff --git a/package/firmware/vsc73x5-ucode/files/Makefile b/package/firmware/vsc73x5-ucode/files/Makefile
new file mode 100644
index 0000000000..550f51df79
--- /dev/null
+++ b/package/firmware/vsc73x5-ucode/files/Makefile
@@ -0,0 +1,20 @@
+#
+# Copyright (C) 2010 OpenWrt.org
+#
+# This is free software, licensed under the GNU General Public License v2.
+# See /LICENSE for more information.
+#
+
+CC:=gcc
+OBJCOPY:=objcopy
+
+all: g5_Plus1_2_31_unmanaged_Atheros_v3.bin \
+     g5_Plus1_2_31_unmanaged_Atheros_v4.bin \
+     g5_Plus1_2_29b_unmanaged_Atheros_v5.bin \
+     g5e_Plus1_2_29a_unmanaged_Atheros_v3.bin
+
+%.o: %.c
+	$(CC) $(CFLAGS) -c $^ -o $@
+
+%.bin: %.o
+	$(OBJCOPY) -O binary -j .data $^ $@