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author | Florian Fainelli <florian@openwrt.org> | 2013-01-17 22:29:22 +0000 |
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committer | Florian Fainelli <florian@openwrt.org> | 2013-01-17 22:29:22 +0000 |
commit | 973e3f5a68427426061c106fceff6b5b2e981171 (patch) | |
tree | 95dfac9d962a6fea88c763e180db6f14ee311c2a | |
parent | 0122099b356c20d7ae68ce5de04199a990018db2 (diff) | |
download | master-187ad058-973e3f5a68427426061c106fceff6b5b2e981171.tar.gz master-187ad058-973e3f5a68427426061c106fceff6b5b2e981171.tar.bz2 master-187ad058-973e3f5a68427426061c106fceff6b5b2e981171.zip |
mvebu: enable PCIe on Marvell Armada 370 Reference Design
Signed-off-by: Florian Fainelli <florian@openwrt.org>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@35213 3c298f89-4303-0410-b956-a3cf2f4a3e73
-rw-r--r-- | target/linux/mvebu/patches-3.8/044-arm_mvebu_add_pcie_dt_a370_rd.patch | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/target/linux/mvebu/patches-3.8/044-arm_mvebu_add_pcie_dt_a370_rd.patch b/target/linux/mvebu/patches-3.8/044-arm_mvebu_add_pcie_dt_a370_rd.patch new file mode 100644 index 0000000000..f3a02d7874 --- /dev/null +++ b/target/linux/mvebu/patches-3.8/044-arm_mvebu_add_pcie_dt_a370_rd.patch @@ -0,0 +1,23 @@ +--- a/arch/arm/boot/dts/armada-370-rd.dts ++++ b/arch/arm/boot/dts/armada-370-rd.dts +@@ -71,5 +71,20 @@ + usb@d0051000 { + status = "okay"; + }; ++ ++ pcie-controller { ++ status = "okay"; ++ /* ++ * The two PCIe units are accessible through ++ * both standard PCIe slots and mini-PCIe ++ * slots on the board. ++ */ ++ pcie0@0xd0040000 { ++ status = "okay"; ++ }; ++ pcie1@0xd0080000 { ++ status = "okay"; ++ }; ++ }; + }; + }; |