opt_01.v « PRESENTATION_ExSyn « manual - iCE40/yosys - [no description]

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module test(input A, B, output Y);
assign Y = A ? A ? B : 1'b1 : B;
endmodule

tion.Magic */ .highlight .vc { color: #336699 } /* Name.Variable.Class */ .highlight .vg { color: #dd7700 } /* Name.Variable.Global */ .highlight .vi { color: #3333bb } /* Name.Variable.Instance */ .highlight .vm { color: #336699 } /* Name.Variable.Magic */ .highlight .il { color: #0000DD; font-weight: bold } /* Literal.Number.Integer.Long */

package power is
  type voltage is range integer'low to integer'high units
    uV;
    mV = 1000 uV;
     V = 1000 mV;
    kV = 1000  V;
  end units;
end package;

use work.power.all;

entity LTC is
  generic (
    V_MIN : voltage := 0 V;
    V_MAX : voltage := voltage'high
  );
  port (
    Vin  : in  voltage range 0 V to 15 V;
    Vout : out voltage range V_MIN to V_MAX
  );
end entity;

architecture ic of LTC is
begin
  Vout <= Vin * 0.95;
end architecture;

use work.power.all;

entity board is
  port (
    Vin  : in  voltage;
    Vout : out voltage
  );
end entity;

architecture ic of board is
begin
  U1: entity work.LTC
    port map (
      Vin  => 2.5 V,
      Vout => open
    );
end architecture;