1 2 3 4 5 6 7 8 9 10 11 12 13 1module test (A, B, X, Y); input [7:0] A, B; output [7:0] X = A + B; output [7:0] Y = A + A; endmodule
module test (A, B, X, Y); input [7:0] A, B; output [7:0] X = A + B; output [7:0] Y = A + A; endmodule