examples/intel/MAX10/sevenseg.v


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generated by cgit v1.2.3 (git 2.25.1) at 2025-09-09 13:19:22 +0000
 

n>cc $<

frontends/verilog/verilog_parser.tab.o: CXXFLAGS += -DYYMAXDEPTH=10000000

OBJS += frontends/verilog/verilog_parser.tab.o
OBJS += frontends/verilog/verilog_lexer.o
OBJS += frontends/verilog/preproc.o
OBJS += frontends/verilog/verilog_frontend.o
OBJS += frontends/verilog/const2ast.o