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* blackbox: Include whiteboxed modulesgatecat2021-03-171-0/+14
* verilog: support module scope identifiers in parametric modulesZachary Snow2021-03-161-0/+29
* proc_arst: Add special-casing of clock signal in conditionals.Marcelina Kościelnicka2021-03-151-0/+31
* opt_clean: Remove init attribute bits together with removed DFFs.Marcelina Kościelnicka2021-03-151-11/+20
* rtlil: Disallow 0-width chunks in SigSpec.Marcelina Kościelnicka2021-03-151-0/+14
* sv: allow globals in one file to depend on globals in anotherZachary Snow2021-03-121-0/+20
* verilog: disallow overriding global parametersZachary Snow2021-03-111-0/+16
* memory_dff: Remove now-useless write port handling.Marcelina Kościelnicka2021-03-082-2/+1
* proc_dff: Fix emitted FF when a register is not assigned in async resetMarcelina Kościelnicka2021-03-081-0/+23
* tests/bram: Do not generate write address collisions.Marcelina Kościelnicka2021-03-081-5/+23
* Merge pull request #2626 from zachjs/param-no-defaultwhitequark2021-03-0710-0/+177
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| * sv: support for parameters without default valuesZachary Snow2021-03-0210-0/+177
* | Merge pull request #2632 from zachjs/width-limitwhitequark2021-03-072-0/+33
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| * | verilog: impose limit on maximum expression widthZachary Snow2021-03-042-0/+33
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* / sv: fix some edge cases for unbased unsized literalsZachary Snow2021-03-062-0/+47
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* verilog: fix sizing of ports with int types in module headersZachary Snow2021-03-012-0/+61
* verilog: fix handling of nested ifdef directivesZachary Snow2021-03-017-0/+159
* Set aside extraneous tests in simple_abc9 test suiteZachary Snow2021-03-012-0/+19
* Merge pull request #2615 from zachjs/genrtlil-conflictwhitequark2021-03-016-0/+56
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| * genrtlil: improve name conflict error messagingZachary Snow2021-02-266-0/+56
* | sv: extended support for integer typesZachary Snow2021-02-284-0/+78
* | Add tests for $countbitsMichael Singer2021-02-262-0/+76
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* Extend "delay" expressions to handle pair and triplet, i.e. rise, fall and tu...TimRudy2021-02-242-0/+438
* Add tests for some common techmap files.Marcelina Kościelnicka2021-02-243-0/+50
* Merge pull request #2594 from zachjs/func-arg-widthwhitequark2021-02-238-37/+94
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| * verilog: fix sizing of constant args for tasks/functionsZachary Snow2021-02-218-37/+94
* | machxo2: Switch to LUT4 sim model which propagates less undefined/don't care ...William D. Jones2021-02-231-1/+1
* | machxo2: Update tribuf test to reflect active-low OE.William D. Jones2021-02-231-1/+2
* | machxo2: Add believed-to-be-correct tribuf test.William D. Jones2021-02-231-0/+9
* | machxo2: Add passing fsm, mux, and shifter tests.William D. Jones2021-02-233-0/+65
* | machxo2: Add add_sub test. Fix tests to include FACADE_IO primitives.William D. Jones2021-02-233-3/+11
* | machxo2: Add dffe test.William D. Jones2021-02-231-0/+9
* | machxo2: Add dff.ys test, fix another cells_map.v typo.William D. Jones2021-02-231-0/+10
* | machxo2: Add test/arch/machxo2 directory (test does not pass).William D. Jones2021-02-233-0/+14
* | assertpmux: Fix crash on unused $pmux output.Marcelina Kościelnicka2021-02-221-0/+18
* | Merge pull request #2586 from zachjs/tern-recursewhitequark2021-02-212-0/+76
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| * | verilog: support recursive functions using ternary expressionsZachary Snow2021-02-122-0/+76
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* / verilog: error on macro invocations with missing argument listsZachary Snow2021-02-192-0/+22
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* Merge pull request #2573 from zachjs/repeat-callwhitequark2021-02-112-0/+94
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| * verilog: refactored constant function evaluationZachary Snow2021-02-042-0/+94
* | Merge pull request #2578 from zachjs/genblk-portZachary Snow2021-02-112-0/+22
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| * | verlog: allow shadowing module ports within generate blocksZachary Snow2021-02-072-0/+22
* | | Add missing is_signed to type_atomKamil Rakoczy2021-02-111-0/+19
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* | genrtlil: fix signed port connection codegen failuresZachary Snow2021-02-052-7/+28
* | Add check of begin/end labels for genblockKamil Rakoczy2021-02-041-0/+26
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* Merge pull request #2529 from zachjs/unnamed-genblkwhitequark2021-02-0423-6/+495
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| * verilog: significant block scoping improvementsZachary Snow2021-01-3123-6/+495
* | Merge pull request #2436 from dalance/fix_generatewhitequark2021-02-032-7/+4
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| * | Fix begin/end in generatedalance2020-11-112-7/+4
* | | verilog: strip leading and trailing spaces in macro argsZachary Snow2021-01-281-0/+20
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