| Commit message (Expand) | Author | Age | Files | Lines | ||
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| * | | | | | | | | xilinx: Add xilinx_dffopt pass (#1557) | Marcin Kościelnicki | 2019-12-18 | 3 | -3/+232 | |
| * | | | | | | | | xilinx: Improve flip-flop handling. | Marcin Kościelnicki | 2019-12-18 | 3 | -11/+12 | |
| * | | | | | | | | Merge pull request #1574 from YosysHQ/eddie/xilinx_lutram | Eddie Hung | 2019-12-16 | 10 | -53/+228 | |
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| | * | | | | | | | | Disable RAM16X1D test | Eddie Hung | 2019-12-13 | 1 | -17/+17 | |
| | * | | | | | | | | Remove extraneous synth_xilinx call | Eddie Hung | 2019-12-12 | 1 | -2/+0 | |
| | * | | | | | | | | Add tests for these new models | Eddie Hung | 2019-12-12 | 1 | -0/+40 | |
| | * | | | | | | | | Add #1460 testcase | Eddie Hung | 2019-12-12 | 1 | -0/+34 | |
| | * | | | | | | | | Rename memory tests to lutram, add more xilinx tests | Eddie Hung | 2019-12-12 | 9 | -53/+156 | |
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| * | | | | | | | | Add another test | Eddie Hung | 2019-12-16 | 1 | -1/+8 | |
| * | | | | | | | | Accidentally commented out tests | Eddie Hung | 2019-12-16 | 1 | -47/+47 | |
| * | | | | | | | | Add unconditional match blocks for force RAM | Eddie Hung | 2019-12-16 | 1 | -0/+9 | |
| * | | | | | | | | Merge blockram tests | Eddie Hung | 2019-12-16 | 3 | -47/+81 | |
| * | | | | | | | | Fixing compiler warning/issues. Moving test script to the correct place | Diego H | 2019-12-16 | 1 | -6/+6 | |
| * | | | | | | | | Removing fixed attribute value to !ramstyle rules | Diego H | 2019-12-15 | 1 | -3238/+0 | |
| * | | | | | | | | Merging attribute rules into a single match block; Adding tests | Diego H | 2019-12-15 | 3 | -0/+3373 | |
| * | | | | | | | | Renaming BRAM memory tests for the sake of uniformity | Diego H | 2019-12-13 | 2 | -6/+6 | |
| * | | | | | | | | Fixing citation in xc7_xcu_brams.txt file. Fixing RAMB36E1 test. | Diego H | 2019-12-12 | 1 | -2/+2 | |
| * | | | | | | | | Adding a note (TODO) in the memory_params.ys check file | Diego H | 2019-12-12 | 1 | -0/+2 | |
| * | | | | | | | | Updating RAMB36E1 thresholds. Adding test for both RAMB18E1/RAMB36E1 | Diego H | 2019-12-12 | 2 | -0/+90 | |
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| * | | | | | | | Merge pull request #1545 from YosysHQ/eddie/ice40_wrapcarry_attr | Eddie Hung | 2019-12-09 | 3 | -23/+136 | |
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| | * | | | | | | unmap $__ICE40_CARRY_WRAPPER in test | Eddie Hung | 2019-12-09 | 1 | -1/+21 | |
| | * | | | | | | ice40_wrapcarry to really preserve attributes via -unwrap option | Eddie Hung | 2019-12-09 | 1 | -3/+5 | |
| | * | | | | | | Drop keep=0 attributes on SB_CARRY | Eddie Hung | 2019-12-06 | 1 | -2/+2 | |
| | * | | | | | | Add WIP test for unwrapping $__ICE40_CARRY_WRAPPER | Eddie Hung | 2019-12-05 | 1 | -0/+30 | |
| | * | | | | | | Check SB_CARRY name also preserved | Eddie Hung | 2019-12-03 | 1 | -0/+1 | |
| | * | | | | | | Add testcase | Eddie Hung | 2019-12-03 | 1 | -0/+60 | |
| * | | | | | | | tests: arch: xilinx: Change order of arguments in macc.sh | Jan Kowalewski | 2019-12-06 | 1 | -1/+1 | |
| * | | | | | | | iopadmap: Refactor and fix tristate buffer mapping. (#1527) | Marcin Kościelnicki | 2019-12-04 | 1 | -0/+99 | |
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| * | | | | | | Merge pull request #1524 from pepijndevos/gowindffinit | Clifford Wolf | 2019-12-03 | 3 | -2/+301 | |
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| | * | | | | | | update test | Pepijn de Vos | 2019-12-03 | 1 | -2/+3 | |
| | * | | | | | | Use -match-init to not synth contradicting init values | Pepijn de Vos | 2019-12-03 | 1 | -10/+12 | |
| | * | | | | | | attempt to fix formatting | Pepijn de Vos | 2019-11-25 | 1 | -138/+138 | |
| | * | | | | | | gowin: add and test dff init values | Pepijn de Vos | 2019-11-25 | 2 | -0/+296 | |
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| * | | | | | | abc9: Fix breaking of SCCs | David Shah | 2019-12-01 | 1 | -0/+6 | |
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| * | | | | | Merge pull request #1536 from YosysHQ/eddie/xilinx_dsp_muladd | Eddie Hung | 2019-11-27 | 1 | -0/+69 | |
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| | * | | | | | No need for -abc9 | Eddie Hung | 2019-11-26 | 1 | -1/+1 | |
| | * | | | | | Add citation | Eddie Hung | 2019-11-26 | 1 | -0/+1 | |
| | * | | | | | Add testcase derived from fastfir_dynamictaps benchmark | Eddie Hung | 2019-11-26 | 1 | -0/+68 | |
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| * | | | | | Merge pull request #1534 from YosysHQ/mwk/opt_share-fix | Clifford Wolf | 2019-11-27 | 1 | -0/+13 | |
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| | * | | | | opt_share: Fix handling of fine cells. | Marcin Kościelnicki | 2019-11-27 | 1 | -0/+13 | |
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| * / / / | Remove notes | Eddie Hung | 2019-11-26 | 1 | -9/+0 | |
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| * | | | clkbufmap: Add support for inverters in clock path. | Marcin Kościelnicki | 2019-11-25 | 1 | -5/+16 | |
| * | | | xilinx: Use INV instead of LUT1 when applicable | Marcin Kościelnicki | 2019-11-25 | 4 | -8/+8 | |
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| * | | Merge pull request #1511 from YosysHQ/dave/always | Clifford Wolf | 2019-11-22 | 1 | -0/+63 | |
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| | * | | sv: Add tests for SV always types | David Shah | 2019-11-21 | 1 | -0/+63 | |
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| * / | gowin: Remove show command from tests. | Marcin Kościelnicki | 2019-11-22 | 1 | -1/+0 | |
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| * | Merge pull request #1449 from pepijndevos/gowin | Clifford Wolf | 2019-11-19 | 12 | -0/+248 | |
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| | * | Merge branch 'master' of https://github.com/YosysHQ/yosys into gowin | Pepijn de Vos | 2019-11-16 | 5 | -17/+34 | |
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| | * | | fix fsm test with proper clock enable polarity | Pepijn de Vos | 2019-11-11 | 1 | -0/+11 | |
| | * | | fix wide luts | Pepijn de Vos | 2019-11-06 | 1 | -7/+10 | |
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index : iCE40/yosys | |
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