| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | proc_rom: Add special handling of const-0 address bits. | Marcelina Kościelnicka | 2022-05-18 | 1 | -0/+146 |
| * | Add proc_rom pass. | Marcelina Kościelnicka | 2022-05-13 | 1 | -0/+43 |
| * | proc_prune: Make assign removal and promotion per-bit, remember promoted bits. | Marcelina Kościelnicka | 2021-08-14 | 1 | -0/+22 |
| * | proc_rmdead: use explicit pattern set when there are no wildcards | Zachary Snow | 2021-07-29 | 2 | -0/+50 |
| * | proc_arst: Add special-casing of clock signal in conditionals. | Marcelina Kościelnicka | 2021-03-15 | 1 | -0/+31 |
| * | proc_dff: Fix emitted FF when a register is not assigned in async reset | Marcelina Kościelnicka | 2021-03-08 | 1 | -0/+23 |
| * | proc_clean: fix order of switch insertion. | whitequark | 2019-08-19 | 4 | -0/+35 |
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index : iCE40/yosys | |
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