techlibs/xilinx/xcu_brams_map.v


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	Commit message (Expand)	Author	Age	Files	Lines
*	xilinx: Add block RAM mapping for Virtex 2* and Spartan 3*.	Marcin Kościelnicki	2020-02-07	1	-0/+2
*	xilinx: Add support for UltraScale[+] BRAM mapping	David Shah	2019-10-23	1	-0/+384