| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | xilinx: Add block RAM mapping for Virtex 2* and Spartan 3*. | Marcin Kościelnicki | 2020-02-07 | 1 | -0/+3 |
| * | RST -> RSTBRST for RAMB8BWER | Eddie Hung | 2019-07-29 | 1 | -3/+3 |
| * | synth_xilinx: Initial Spartan 6 block RAM inference support. | Marcin Kościelnicki | 2019-07-11 | 1 | -0/+255 |
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index : iCE40/yosys | |
| clone of https://github.com/YosysHQ/yosys |
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