| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | machxo2: Fix cells_sim typo where OFX1 was multiply-driven. | William D. Jones | 2021-02-23 | 1 | -1/+1 |
| * | machxo2: Add initial value for Q in FACADE_FF. | William D. Jones | 2021-02-23 | 1 | -0/+2 |
| * | machxo2: Add FACADE_IO simulation model. More comments on models. | William D. Jones | 2021-02-23 | 1 | -0/+25 |
| * | machxo2: Add FACADE_SLICE simulation model. | William D. Jones | 2021-02-23 | 1 | -0/+83 |
| * | machxo2: Improve FACADE_FF simulation model. | William D. Jones | 2021-02-23 | 1 | -12/+20 |
| * | machxo2: Improve LUT4 techmap. Use same output port name for LUT4 as Lattice. | William D. Jones | 2021-02-23 | 1 | -2/+2 |
| * | machxo2: Fix more oversights in machxo2 models. logic.ys test passes. | William D. Jones | 2021-02-23 | 1 | -1/+1 |
| * | machxo2: Fix typos. test/arch/run-test.sh passes. | William D. Jones | 2021-02-23 | 1 | -1/+1 |
| * | machxo2: Create basic techlibs and synth_machxo2 pass. | William D. Jones | 2021-02-23 | 1 | -0/+62 |
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index : iCE40/yosys | |
| clone of https://github.com/YosysHQ/yosys |
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