iCE40/yosys - clone of https://github.com/YosysHQ/yosys

	Commit message (Expand)	Author	Age	Files	Lines
*	Reduce amount of trailing whitespace in code base	Larry Doolittle	2019-02-28	1	-2/+2
*	Initial support for Anlogic FPGA	Miodrag Milanovic	2018-12-01	1	-0/+113