iCE40/yosys - [no description]

	Commit message (Collapse)	Author	Age	Files	Lines
*	Manual fixes for new cell connections API	Clifford Wolf	2014-07-26	31	-101/+147
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*	Changed users of cell->connections_ to the new API (sed command)	Clifford Wolf	2014-07-26	45	-835/+835
\| \| \| \| \| \| \| \| \|	git grep -l 'connections_' \| xargs sed -i -r -e ' s/(->\|\.)connections_\["([^"])"\] = (.);/\1set("\2", \3);/g; s/(->\|\.)connections_\["([^"])"\]/\1get("\2")/g; s/(->\|\.)connections_.at$"([^"])"$/\1get("\2")/g; s/(->\|\.)connections_.push_back/\1connect/g; s/(->\|\.)connections_/\1connections()/g;'
*	Renamed RTLIL::{Module,Cell}::connections to connections_	Clifford Wolf	2014-07-26	45	-835/+835
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*	Added copy-constructor-like module->addCell(name, other) method	Clifford Wolf	2014-07-26	2	-12/+5
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*	Use only module->addCell() and module->remove() to create and delete cells	Clifford Wolf	2014-07-25	30	-465/+171
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*	Various RTLIL::SigSpec related code cleanups	Clifford Wolf	2014-07-25	1	-3/+3
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*	Fixed memory corruption in "opt_reduce" pass	Clifford Wolf	2014-07-25	1	-5/+7
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*	Disabled cover() for non-linux builds	Clifford Wolf	2014-07-25	1	-2/+5
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*	Improvements in "cover" command	Clifford Wolf	2014-07-25	1	-11/+37
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*	Replaced more old SigChunk programming patterns	Clifford Wolf	2014-07-24	6	-46/+40
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*	Added cover() calls to opt_const	Clifford Wolf	2014-07-24	1	-9/+45
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*	Added "make SMALL=1"	Clifford Wolf	2014-07-24	1	-1/+4
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*	Added "make PRETTY=1"	Clifford Wolf	2014-07-24	1	-6/+6
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*	Added "cover" command	Clifford Wolf	2014-07-24	3	-1/+117
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*	Various small fixes (from gcc compiler warnings)	Clifford Wolf	2014-07-23	1	-4/+4
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*	Removed RTLIL::SigSpec::optimize()	Clifford Wolf	2014-07-23	16	-48/+6
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*	Removed RTLIL::SigSpec::expand() method	Clifford Wolf	2014-07-23	9	-211/+135
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*	Fixed all users of SigSpec::chunks_rw() and removed it	Clifford Wolf	2014-07-23	10	-86/+75
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*	Refactoring {SigSpec\|SigChunk}(RTLIL::Wire *wire, ..) constructor -- step 3/3	Clifford Wolf	2014-07-23	10	-24/+24
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*	Refactoring {SigSpec\|SigChunk}(RTLIL::Wire *wire, ..) constructor -- step 2/3	Clifford Wolf	2014-07-23	10	-24/+24
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*	Refactoring {SigSpec\|SigChunk}(RTLIL::Wire *wire, ..) constructor -- step 1/3	Clifford Wolf	2014-07-23	2	-5/+5
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*	SigSpec refactoring: cleanup of old SigSpec usage in fsm_* commands	Clifford Wolf	2014-07-22	3	-38/+19
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*	Fixed memory corruption with new SigSpec API in proc_mux	Clifford Wolf	2014-07-22	1	-7/+3
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*	fixed memory leak in fsm_opt	Clifford Wolf	2014-07-22	1	-1/+3
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*	SigSpec refactoring: change RTLIL::SigSpec::chunks() to be read-only, ↵	Clifford Wolf	2014-07-22	13	-22/+17
\| \| \| \|	created interim RTLIL::SigSpec::chunks_rw()
*	SigSpec refactoring: using the accessor functions everywhere	Clifford Wolf	2014-07-22	45	-505/+505
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*	SigSpec refactoring: renamed chunks and width to __chunks and __width	Clifford Wolf	2014-07-22	45	-505/+505
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*	Added "opt_const -keepdc"	Clifford Wolf	2014-07-21	2	-15/+168
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*	Added mul to mux conversion to "opt_const -fine"	Clifford Wolf	2014-07-21	1	-0/+55
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*	Added "opt_const -fine" and "opt_reduce -fine"	Clifford Wolf	2014-07-21	3	-15/+144
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*	Added opt_const support for simple identities	Clifford Wolf	2014-07-21	1	-0/+69
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*	Replaced depricated NEW_WIRE macro with module->addWire() calls	Clifford Wolf	2014-07-21	2	-12/+12
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*	Removed deprecated module->new_wire()	Clifford Wolf	2014-07-21	8	-31/+31
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*	Wider range of cell types supported in "share" pass	Clifford Wolf	2014-07-21	1	-17/+197
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*	Use ezSAT::non_incremental() in "share" pass	Clifford Wolf	2014-07-21	1	-0/+2
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*	Added support for resource sharing in mux control logic	Clifford Wolf	2014-07-20	1	-86/+155
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*	Added "select -assert-count"	Clifford Wolf	2014-07-20	1	-6/+43
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*	Supercell creation for $div/$mod worked all along, fixed test benches	Clifford Wolf	2014-07-20	1	-4/+0
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*	Fixed creation of shift supercells in "share" pass	Clifford Wolf	2014-07-20	1	-4/+20
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*	Added "miter -equiv -flatten"	Clifford Wolf	2014-07-20	1	-0/+14
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*	Added call_on_selection() and call_on_module() API	Clifford Wolf	2014-07-20	2	-10/+2
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*	Added "share" supercell creation	Clifford Wolf	2014-07-20	1	-1/+115
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*	Added removing of always inactive cells to "share" pass	Clifford Wolf	2014-07-20	1	-8/+42
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*	Progress in "share" pass	Clifford Wolf	2014-07-20	1	-112/+185
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*	Progress in "share" pass	Clifford Wolf	2014-07-20	1	-19/+56
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*	Started to implement real resource sharing	Clifford Wolf	2014-07-19	2	-0/+444
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*	Improved memory_share log messages	Clifford Wolf	2014-07-19	1	-3/+3
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*	More verbose memory_share help message	Clifford Wolf	2014-07-19	1	-0/+17
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*	Added SAT-based write-port sharing to memory_share	Clifford Wolf	2014-07-19	1	-0/+180
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*	Fixed bug in memory_share feedback-to-en code	Clifford Wolf	2014-07-19	1	-4/+12
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