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* Consistent use of 'override' for virtual methods in derived classes.Henner Zeller2018-07-20120-265/+264
| | | | | | | | | o Not all derived methods were marked 'override', but it is a great feature of C++11 that we should make use of. o While at it: touched header files got a -*- c++ -*- for emacs to provide support for that language. o use YS_OVERRIDE for all override keywords (though we should probably use the plain keyword going forward now that C++11 is established)
* Add async2sync passClifford Wolf2018-07-192-0/+148
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* ecp5: Adding synchronous set/reset supportDavid Shah2018-07-143-3/+155
| | | | Signed-off-by: David Shah <davey1576@gmail.com>
* Add automatic verific import in hierarchy commandClifford Wolf2018-06-201-1/+19
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Be slightly less aggressive in "deminout" passClifford Wolf2018-06-191-4/+28
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Include module name for area summary statsEdmond Cote2018-06-181-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | The PR prints the name of the module when displaying the final area count. Pros: - Easier for the user to `grep` for area information about a specific module Cons: - Arguably more verbose, less "pretty" than author desires Verification: ~~~~ 30c30 < Chip area for this module: 20616.349000 --- > Chip area for module '$paramod$d1738fc0bb353d517bc2caf8fef2abb20bced034\picorv32': 20616.349000 70c70 < Chip area for this module: 88.697700 --- > Chip area for module '\picorv32_axi_adapter': 88.697700 102c102 < Chip area for this module: 20705.046700 --- > Chip area for top module '\picorv32_axi': 20705.046700 ~~~~
* Add setundef -anyseq / -anyconst support to -undriven modeClifford Wolf2018-06-011-3/+11
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Add "setundef -anyconst"Clifford Wolf2018-06-011-20/+41
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Bugfix in handling of array instances with empty portsClifford Wolf2018-05-311-1/+1
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Disable memory_dff for initialized FFsClifford Wolf2018-05-281-1/+19
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Add some cleanup code to memory_nordffClifford Wolf2018-05-281-26/+36
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Fix infinite loop in abc command under emscriptenRobert Ou2018-05-181-5/+7
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* Add an option to statically link abc into yosysRobert Ou2018-05-181-0/+20
| | | | This is currently incomplete because the output filter no longer works.
* Fix iopadmap for loops between tristate IO buffersClifford Wolf2018-05-151-0/+21
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Fix iopadmap for cases where IO pins already have buffers on themClifford Wolf2018-05-151-1/+35
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Some cleanups in setundef.ccClifford Wolf2018-05-131-0/+7
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Add "#ifdef __FreeBSD__"Christian Krämer2018-05-131-1/+1
| | | | (Re-commit e3575a8 with corrected author field)
* Revert "Add "#ifdef __FreeBSD__""Clifford Wolf2018-05-131-1/+1
| | | | This reverts commit e3575a86c525f2511902e7022893c3923ba8093e.
* Add optimization of tristate buffer with constant control inputClifford Wolf2018-05-121-0/+17
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Add "hierarchy -simcheck"Clifford Wolf2018-05-121-7/+23
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Add "#ifdef __FreeBSD__"Johnny Sorocil2018-05-051-1/+1
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* Add ABC FAQ to "help abc"Clifford Wolf2018-05-041-2/+6
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Replace -ignore_redef with -[no]overwriteClifford Wolf2018-05-031-2/+2
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Added missing dont_use handling for SR FFs to dfflibmapClifford Wolf2018-04-051-0/+4
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Removed $timescale from "sat" command VCD writerClifford Wolf2018-03-291-1/+0
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Chenged "extensions_map" to "extensions_list" in hierarchy.ccClifford Wolf2018-03-271-2/+2
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* passes/hierarchy: Reduce code duplication in expand_moduleSergi Granell2018-03-271-15/+13
| | | | | | This also makes it easier to add new file extensions support. Signed-off-by: Sergi Granell <xerpi.g.12@gmail.com>
* Add .sv support to "hierarchy -libdir"Clifford Wolf2018-03-261-0/+6
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* Add "expose -input"Clifford Wolf2018-03-121-8/+43
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Add "setundef -undef"Clifford Wolf2018-03-121-0/+11
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Fix handling of src attributes in flattenClifford Wolf2018-03-101-7/+2
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Add "memory_nordff" passClifford Wolf2018-03-062-0/+112
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Fix connwrappers help messageClifford Wolf2018-03-041-1/+1
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Add $dlatchsr support to clk2fflogicClifford Wolf2018-02-261-4/+25
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* Fix opt_rmdff handling of $dlatchsrClifford Wolf2018-02-261-0/+3
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Add $allconst and $allseq cell typesClifford Wolf2018-02-231-0/+2
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Recognize stand-alone obj pattern even when it contains a slashClifford Wolf2018-02-131-0/+3
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* Improve log messages in equiv_makeClifford Wolf2018-01-191-2/+2
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Add "dffinit -highlow" and fix synth_intelClifford Wolf2018-01-091-0/+20
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Add support for "yosys -E"Clifford Wolf2018-01-077-0/+12
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Bugfix in hierarchy blackbox module port width handlingClifford Wolf2018-01-071-1/+2
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* Bugfix in hierarchy handling of blackbox module portsClifford Wolf2018-01-051-5/+4
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Merge pull request #480 from Fatsie/liberty_value_expressionClifford Wolf2018-01-041-2/+22
|\ | | | | Value of properties can be expression.
| * Value of properties can be expression.Staf Verhaegen2018-01-031-2/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Example found in the 2007.03 Liberty Reference Manual that was also found in the wild: input_voltage(CMOS) { vil : 0.3 * VDD ; vih : 0.7 * VDD ; vimin : -0.5 ; vimax : VDD + 0.5 ; } Current implementation just parses the expression but no interpretation is done.
* | Temporarily derive blackbox modules in hierarchy to evaluate port widthsClifford Wolf2018-01-041-1/+14
|/ | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Fix a bug in clk2fflogic memory handlingClifford Wolf2017-12-141-1/+1
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* Add clk2fflogic memory supportClifford Wolf2017-12-141-1/+77
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* Check for memories in clk2fflogicClifford Wolf2017-12-131-0/+5
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* Add warnings for driver-driver conflicts between FFs (and other cells) and ↵Clifford Wolf2017-12-122-3/+11
| | | | constants
* Add support for editline as replacement for readlineClifford Wolf2017-11-081-0/+4
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