| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Merge remote-tracking branch 'origin/clifford/fix1132' into xc7mux | Eddie Hung | 2019-06-27 | 1 | -6/+25 |
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| | * | Fix handling of partial covers in muxcover, fixes #1132 | Clifford Wolf | 2019-06-27 | 1 | -6/+25 |
| | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | | Revert muxcover.cc to master | Eddie Hung | 2019-06-27 | 1 | -35/+17 |
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| * | | Merge remote-tracking branch 'origin/xaig' into xc7mux | Eddie Hung | 2019-06-26 | 1 | -35/+39 |
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| | * | | Fix spacing | Eddie Hung | 2019-06-26 | 1 | -38/+38 |
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| | * | | Support more than one port in the abc_scc_break attr | Eddie Hung | 2019-06-26 | 1 | -38/+42 |
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| | * | | Missing muxpack.o in Makefile | Eddie Hung | 2019-06-25 | 1 | -0/+1 |
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| * | | | Merge remote-tracking branch 'origin/eddie/fix1132' into xc7mux | Eddie Hung | 2019-06-26 | 1 | -12/+11 |
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| | * | | | Emprically (even if I don't fully understand it) this passes picorv32 tb | Eddie Hung | 2019-06-26 | 1 | -12/+11 |
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| * | | | | Merge remote-tracking branch 'origin/eddie/fix1132' into xc7mux | Eddie Hung | 2019-06-26 | 1 | -1/+1 |
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| | * | | | Remove redundant check (done further down) | Eddie Hung | 2019-06-26 | 1 | -1/+1 |
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| * | | | | Merge remote-tracking branch 'origin/eddie/fix1132' into xc7mux | Eddie Hung | 2019-06-26 | 1 | -1/+1 |
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| | * | | | Restore sigmap wrapper | Eddie Hung | 2019-06-26 | 1 | -1/+1 |
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| * | | | | Merge remote-tracking branch 'origin/eddie/fix1132' into xc7mux | Eddie Hung | 2019-06-26 | 1 | -49/+52 |
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| | * | | | muxcover to be undef-sensitive when computing decoders | Eddie Hung | 2019-06-26 | 1 | -21/+40 |
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| | * | | | Revert "Rework muxcover decoder gen if more significant muxes are 1'bx" | Eddie Hung | 2019-06-26 | 1 | -55/+39 |
| | | | | | | | | | | | | | | | | | This reverts commit b2b5cf78e21def63c54c080217d77afefba8e4c7. | ||||
| * | | | | Merge remote-tracking branch 'origin/eddie/fix1132' into xc7mux | Eddie Hung | 2019-06-26 | 2 | -42/+58 |
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| | * | | | Rework muxcover decoder gen if more significant muxes are 1'bx | Eddie Hung | 2019-06-26 | 1 | -39/+55 |
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| | * | | Improve opt_clean handling of unused public wires | Clifford Wolf | 2019-06-26 | 1 | -2/+2 |
| | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| | * | | Do not clean up buffer cells with "keep" attribute, closes #1128 | Clifford Wolf | 2019-06-26 | 1 | -1/+1 |
| | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | | | Merge remote-tracking branch 'origin/xaig' into xc7mux | Eddie Hung | 2019-06-25 | 2 | -33/+70 |
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| | * | | Merge remote-tracking branch 'origin/master' into xaig | Eddie Hung | 2019-06-25 | 2 | -5/+379 |
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| | | * | Merge pull request #1130 from YosysHQ/eddie/fix710 | Clifford Wolf | 2019-06-25 | 1 | -5/+11 |
| | | |\ | | | | | | | | | memory_dff: walk through more than one mux for computing read enable | ||||
| | | | * | Fix spacing | Eddie Hung | 2019-06-25 | 1 | -4/+3 |
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| | | | * | Move only one consumer check outside of while loop | Eddie Hung | 2019-06-25 | 1 | -6/+5 |
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| | | | * | Walk through as many muxes as exist for rd_en | Eddie Hung | 2019-06-24 | 1 | -8/+16 |
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| | | * | | Merge remote-tracking branch 'origin/master' into eddie/muxpack | Eddie Hung | 2019-06-22 | 3 | -48/+118 |
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| | | * | | Cope with $reduce_or common in case | Eddie Hung | 2019-06-21 | 1 | -5/+37 |
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| | | * | | Fix spacing | Eddie Hung | 2019-06-21 | 1 | -24/+24 |
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| | | * | | Add doc | Eddie Hung | 2019-06-21 | 1 | -3/+3 |
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| | | * | | Fix up ExclusiveDatabase with @cliffordwolf's help | Eddie Hung | 2019-06-21 | 1 | -35/+34 |
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| | | * | | Merge branch 'master' into eddie/muxpack | Eddie Hung | 2019-06-21 | 8 | -11/+51 |
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| | * | | | | nullptr check | Eddie Hung | 2019-06-25 | 1 | -0/+1 |
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| * | | | | | nullptr check | Eddie Hung | 2019-06-24 | 1 | -0/+1 |
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| * | | | | | Merge remote-tracking branch 'origin/xaig' into xc7mux | Eddie Hung | 2019-06-24 | 1 | -9/+52 |
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| | * | | | | Fix for abc_scc_break is bus | Eddie Hung | 2019-06-24 | 1 | -21/+23 |
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| | * | | | | More meaningful error message | Eddie Hung | 2019-06-24 | 1 | -0/+2 |
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| | * | | | | Do not use log_id as it strips \\, also fix scc for |wire| > 1 | Eddie Hung | 2019-06-24 | 1 | -13/+30 |
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| | * | | | | Fix abc9's scc breaker, also break on abc_scc_break attr | Eddie Hung | 2019-06-24 | 1 | -9/+31 |
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| * | | | | | Merge remote-tracking branch 'origin/xaig' into xc7mux | Eddie Hung | 2019-06-21 | 2 | -3/+19 |
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| | * | | | | Merge remote-tracking branch 'origin/master' into xaig | Eddie Hung | 2019-06-21 | 3 | -48/+118 |
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| | | * | | | Merge pull request #1108 from YosysHQ/clifford/fix1091 | Eddie Hung | 2019-06-21 | 1 | -45/+99 |
| | | |\ \ \ | | | | | | | | | | | | | Add support for partial matches to muxcover | ||||
| | | * \ \ \ | Merge pull request #1085 from YosysHQ/eddie/shregmap_improve | Eddie Hung | 2019-06-21 | 1 | -3/+15 |
| | | |\ \ \ \ | | | | | | | | | | | | | | | Improve shregmap to handle case where first flop is common to two chains | ||||
| | | | * | | | | Actually, there might not be any harm in updating sigmap... | Eddie Hung | 2019-06-20 | 1 | -3/+1 |
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| | | | * | | | | Add comment as per @cliffordwolf | Eddie Hung | 2019-06-20 | 1 | -0/+11 |
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| | | | * | | | | Revert "Try way that doesn't involve creating a new wire" | Eddie Hung | 2019-06-11 | 1 | -15/+10 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 2f427acc9ed23c77e89386f4fbf53ac580bf0f0b. | ||||
| | | * | | | | | Merge pull request #1117 from bwidawsk/more-home | Clifford Wolf | 2019-06-21 | 1 | -0/+4 |
| | | |\ \ \ \ \ | | | |_|_|_|/ | | |/| | | | | Add a few more filename rewrites | ||||
| | | | * | | | | Add a few more filename rewrites | Ben Widawsky | 2019-06-20 | 1 | -0/+4 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This now allows a full pipeline to work, something such as: yosys -p "synth_ecp5 -json ~/work/fpga/prjtrellis/examples/ecp5_evn/blinky.v" Otherwise, you will get something along the lines of: ERROR: Can't open output file `~/work/fpga/prjtrellis/examples/ecp5_evn/blinky.v' for writing: No such file or directory Signed-off-by: Ben Widawsky <ben@bwidawsk.net> | ||||
| | * | | | | | | Do not rename non LUT cells in abc9 | Eddie Hung | 2019-06-21 | 1 | -11/+16 |
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| | * | | | | | | Fix gcc warning of potentially uninitialised | Eddie Hung | 2019-06-20 | 1 | -2/+2 |
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index : iCE40/yosys | |
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