iCE40/yosys - [no description]

	Commit message (Expand)	Author	Age	Files	Lines
*	unify cycles counting and cleanup	Miodrag Milanovic	2022-02-02	1	-36/+35
*	added stimulus mode and param check	Miodrag Milanovic	2022-02-02	1	-5/+31
*	error when no signal found	Miodrag Milanovic	2022-01-31	1	-0/+2
*	Cleanup	Miodrag Milanovic	2022-01-31	1	-1/+1
*	Compare bits when not all are defined	Miodrag Milanovic	2022-01-31	1	-3/+17
*	Cleanup	Miodrag Milanovic	2022-01-31	1	-2/+2
*	message update	Miodrag Milanovic	2022-01-31	1	-1/+1
*	Display simulation time data	Miodrag Milanovic	2022-01-31	1	-1/+4
*	Use edges when explicit	Miodrag Milanovic	2022-01-31	1	-1/+5
*	Updating initial state and checks	Miodrag Milanovic	2022-01-31	1	-15/+28
*	Fix scope	Miodrag Milanovic	2022-01-31	1	-1/+1
*	check if stop before start	Miodrag Milanovic	2022-01-28	1	-0/+3
*	set initial state, only flip-flops	Miodrag Milanovic	2022-01-28	1	-1/+28
*	ignore not found private signals	Miodrag Milanovic	2022-01-28	1	-0/+3
*	recursive check	Miodrag Milanovic	2022-01-28	1	-26/+34
*	Do actual compare	Miodrag Milanovic	2022-01-28	1	-5/+16
*	Add more options and time handling	Miodrag Milanovic	2022-01-28	1	-2/+103
*	Display values of outputs	Miodrag Milanovic	2022-01-26	1	-12/+10
*	Check if stimulated	Miodrag Milanovic	2022-01-26	1	-0/+14
*	Read fst and use data to set inputs	Miodrag Milanovic	2022-01-26	1	-10/+92
*	Add ability to write to FST file	Miodrag Milanovic	2022-01-26	1	-11/+109
*	memory: Introduce $meminit_v2 cell, with EN input.	Marcelina Kościelnicka	2021-07-28	1	-0/+1
*	Fixing old e-mail addresses and deadnames	Claire Xenia Wolf	2021-06-08	1	-1/+1
*	sim: Add wide port support.	Marcelina Kościelnicka	2021-05-25	1	-3/+3
*	kernel/rtlil: Extract some helpers for checking memory cell types.	Marcelina Kościelnicka	2021-05-22	1	-1/+1
*	sim: Avoid a crash on empty cell connection.	Marcelina Kościelnicka	2021-03-08	1	-1/+1
*	Add rewrite_filename for sim -vcd argument.	Chris Dailey	2020-11-24	1	-1/+3
*	Merge pull request #2403 from nakengelhardt/sim_timescale	N. Engelhardt	2020-10-22	1	-0/+21
\|\
\| *	use strftime instead of put_time for gcc 4.8 compatibility	N. Engelhardt	2020-10-21	1	-4/+5
\| *	wild guessing at the problem because it builds fine on my machines	N. Engelhardt	2020-10-16	1	-0/+3
\| *	sim -vcd: add date, version, and option for timescale	N. Engelhardt	2020-10-16	1	-0/+17
* \|	sim: Use Mem helper.	Marcelina Kościelnicka	2020-10-21	1	-103/+90
\|/
*	sim - error when memrd and memwr detected	Miodrag Milanovic	2020-06-29	1	-1/+4
*	Use C++11 final/override keywords.	whitequark	2020-06-18	1	-2/+2
*	sim: Fix handling of constant-connected cell inputs at startup	David Shah	2020-04-21	1	-1/+5
*	kernel: big fat patch to use more ID::, otherwise ID()	Eddie Hung	2020-04-02	1	-57/+57
*	kernel: use more ID::*	Eddie Hung	2020-04-02	1	-11/+11
*	Fix sim for assignments with lhs<rhs size, fixes #1565	Clifford Wolf	2019-12-17	1	-1/+1
*	Error out if no top module given before 'sim'	Eddie Hung	2019-06-05	1	-0/+5
*	Fixed minor typo in "sim" help message	acw1251	2018-09-12	1	-1/+1
*	Consistent use of 'override' for virtual methods in derived classes.	Henner Zeller	2018-07-20	1	-2/+2
*	Rename "singleton" pass to "uniquify"	Clifford Wolf	2017-08-20	1	-1/+1
*	Add "sim -zinit -rstlen"	Clifford Wolf	2017-08-18	1	-1/+53
*	Add "sim" support for memories	Clifford Wolf	2017-08-18	1	-2/+136
*	Add support for assert/assume/cover to "sim" command	Clifford Wolf	2017-08-18	1	-4/+47
*	Add writeback mode to "sim" command	Clifford Wolf	2017-08-17	1	-0/+44
*	Improve "sim" command	Clifford Wolf	2017-08-17	1	-54/+272
*	Add "sim" command skeleton	Clifford Wolf	2017-08-16	1	-0/+371