| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Bugfix in $memrd sharing | Clifford Wolf | 2019-01-07 | 1 | -2/+6 |
| | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | Merge pull request #775 from whitequark/opt_flowmap | Clifford Wolf | 2019-01-03 | 1 | -1/+1 |
| |\ | | | | | flowmap: new techmap pass | ||||
| | * | flowmap: new techmap pass. | whitequark | 2019-01-03 | 1 | -1/+1 |
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| * | | Merge pull request #770 from whitequark/opt_expr_cmp | Clifford Wolf | 2019-01-02 | 1 | -97/+134 |
| |\ \ | |/ |/| | opt_expr: refactor and improve simplification of comparisons | ||||
| | * | opt_expr: improve simplification of comparisons with large constants. | whitequark | 2019-01-02 | 1 | -70/+47 |
| | | | | | | | | | | | | | | | | | | | | | | | | | The idea behind this simplification is that a N-bit signal X being compared with an M-bit constant where M>N and the constant has Nth or higher bit set, it either always succeeds or always fails. However, the existing implementation only worked with one-hot signals for some reason. It also printed incorrect messages. This commit adjusts the simplification to have as much power as possible, and fixes other bugs. | ||||
| | * | opt_expr: refactor simplification of unsigned X<onehot and X>=onehot. NFCI. | whitequark | 2019-01-02 | 1 | -31/+37 |
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| | * | opt_expr: refactor simplification of signed X>=0 and X<0. NFCI. | whitequark | 2019-01-02 | 1 | -24/+26 |
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| | * | opt_expr: simplify any unsigned comparisons with all-0 and all-1. | whitequark | 2019-01-02 | 1 | -17/+69 |
| | | | | | | | | | | | | | Before this commit, only unsigned comparisons with all-0 would be simplified. This commit also makes the code handling such comparisons to be more rigorous and not abort on unexpected input. | ||||
| * | | Merge pull request #773 from whitequark/opt_lut_elim_fixes | Clifford Wolf | 2019-01-02 | 1 | -8/+31 |
| |\ \ | | | | | | | opt_lut: elimination fixes | ||||
| | * | | opt_lut: reflect changes in sigmap. | whitequark | 2019-01-02 | 1 | -0/+2 |
| | | | | | | | | | | | | | Otherwise, some LUTs will be missed during elimination. | ||||
| | * | | opt_lut: use a worklist, and revisit cells affected by elimination. | whitequark | 2019-01-02 | 1 | -3/+10 |
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| | * | | opt_lut: count eliminated cells, and set opt.did_something for them. | whitequark | 2019-01-02 | 1 | -6/+20 |
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| * / | Fix typographical and grammatical errors and inconsistencies. | whitequark | 2019-01-02 | 2 | -2/+2 |
| |/ | | | | | | | | | | | | The initial list of hits was generated with the codespell command below, and each hit was evaluated and fixed manually while taking context into consideration. DIRS="kernel/ frontends/ backends/ passes/ techlibs/" DIRS="${DIRS} libs/ezsat/ libs/subcircuit" codespell $DIRS -S *.o -L upto,iff,thru,synopsys,uint More hits were found by looking through comments and strings manually. | ||||
| * | opt_lut: eliminate LUTs evaluating to constants or inputs. | whitequark | 2018-12-31 | 1 | -0/+81 |
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| * | Fix handling of (* keep *) wires in wreduce | Clifford Wolf | 2018-12-31 | 1 | -1/+4 |
| | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | Merge pull request #720 from whitequark/master | Clifford Wolf | 2018-12-16 | 1 | -1/+1 |
| |\ | | | | | lut2mux: handle 1-bit INIT constant in $lut cells | ||||
| | * | opt_lut: simplify type conversion. NFC. | whitequark | 2018-12-05 | 1 | -1/+1 |
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| * | | opt_lut: leave intact LUTs with cascade feeding module outputs. | whitequark | 2018-12-07 | 1 | -0/+6 |
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| * | | opt_lut: show original truth table for both cells. | whitequark | 2018-12-07 | 1 | -2/+3 |
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| * | | opt_lut: add -limit option, for debugging misoptimizations. | whitequark | 2018-12-07 | 1 | -3/+21 |
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| * | | Bugfix in opt_expr handling of a<0 and a>=0 | Clifford Wolf | 2018-12-06 | 1 | -1/+1 |
| |/ | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | Rename opt_lut.cpp to opt_lut.cc | Clifford Wolf | 2018-12-05 | 1 | -0/+0 |
| | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | opt_lut: add -dlogic, to avoid disturbing logic such as carry chains. | whitequark | 2018-12-05 | 1 | -17/+163 |
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| * | opt_lut: always prefer to eliminate 1-LUTs. | whitequark | 2018-12-05 | 1 | -19/+41 |
| | | | | | | These are always either buffers or inverters, and keeping the larger LUT preserves more source-level information about the design. | ||||
| * | opt_lut: collect and display statistics. | whitequark | 2018-12-05 | 1 | -4/+33 |
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| * | opt_lut: refactor to use a worker. NFC. | whitequark | 2018-12-05 | 1 | -170/+177 |
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| * | opt_lut: new pass, to combine LUTs for tighter packing. | whitequark | 2018-12-05 | 2 | -0/+275 |
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| * | Add iteration limit to "opt_muxtree" | Clifford Wolf | 2018-11-20 | 1 | -1/+17 |
| | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | Consistent use of 'override' for virtual methods in derived classes. | Henner Zeller | 2018-07-20 | 11 | -24/+24 |
| | | | | | | | | | | o Not all derived methods were marked 'override', but it is a great feature of C++11 that we should make use of. o While at it: touched header files got a -*- c++ -*- for emacs to provide support for that language. o use YS_OVERRIDE for all override keywords (though we should probably use the plain keyword going forward now that C++11 is established) | ||||
| * | Add optimization of tristate buffer with constant control input | Clifford Wolf | 2018-05-12 | 1 | -0/+17 |
| | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | Fix opt_rmdff handling of $dlatchsr | Clifford Wolf | 2018-02-26 | 1 | -0/+3 |
| | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | Add $allconst and $allseq cell types | Clifford Wolf | 2018-02-23 | 1 | -0/+2 |
| | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | Add warnings for driver-driver conflicts between FFs (and other cells) and ↵ | Clifford Wolf | 2017-12-12 | 1 | -1/+8 |
| | | | | | constants | ||||
| * | Fix memory corruption bug in opt_rmdff | Clifford Wolf | 2017-10-26 | 1 | -0/+3 |
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| * | Fix typo in opt_clean log message | Clifford Wolf | 2017-10-26 | 1 | -1/+1 |
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| * | Revert 90be0d8 as it causes endless loops for some designs | Clifford Wolf | 2017-10-14 | 1 | -1/+0 |
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| * | Fix input vector for reduce cells. | Kaj Tuomi | 2017-10-12 | 1 | -0/+1 |
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| * | Minor changes to opt_demorgan requested during code review | Andrew Zonenberg | 2017-09-14 | 2 | -18/+18 |
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| * | Initial version of opt_demorgan is functioning for AND/OR gates. Not the ↵ | Andrew Zonenberg | 2017-09-12 | 2 | -0/+203 |
| | | | | | prettiest results for bus inputs, but this can be improved | ||||
| * | Don't track , ... contradictions through x/z-bits | Clifford Wolf | 2017-08-25 | 1 | -1/+4 |
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| * | Add removing of redundant pairs of bits in ==, ===, !=, and !== to opt_expr | Clifford Wolf | 2017-08-25 | 1 | -0/+72 |
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| * | Mostly coding style related fixes in rmports pass | Clifford Wolf | 2017-08-15 | 1 | -30/+33 |
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| * | rmports: Now remove ports from cell instances if we optimized them out of ↵ | Andrew Zonenberg | 2017-08-14 | 1 | -2/+35 |
| | | | | | that cell | ||||
| * | ProcessModule is no longer virtual (why was it in the first place?) | Andrew Zonenberg | 2017-08-14 | 1 | -1/+1 |
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| * | rmports now works on all modules in the design, not just the top. | Andrew Zonenberg | 2017-08-14 | 1 | -4/+7 |
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| * | Updated Makefile to reflect opt_rmports being renamed to rmports | Andrew Zonenberg | 2017-08-14 | 1 | -1/+1 |
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| * | Renamed opt_rmports pass to rmports | Andrew Zonenberg | 2017-08-14 | 1 | -5/+5 |
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| * | Improved handling of constant connections in opt_rmports | Andrew Zonenberg | 2017-08-14 | 1 | -0/+2 |
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| * | Fixed handling of cell ports that aren't wires | Andrew Zonenberg | 2017-08-14 | 1 | -0/+3 |
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| * | opt_rmports: Fixed incorrect handling of multi-bit nets | Andrew Zonenberg | 2017-08-14 | 1 | -12/+27 |
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