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* Do not create deep backtraces unless in ENABLE_DEBUG modeClifford Wolf2018-02-031-0/+4
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Add support for "yosys -E"Clifford Wolf2018-01-074-2/+36
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Bugfix in hierarchy handling of blackbox module portsClifford Wolf2018-01-052-2/+4
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Add RTLIL::Const::is_fully_ones()Clifford Wolf2017-12-142-0/+12
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* Add SigSpec::is_fully_ones()Clifford Wolf2017-12-142-0/+16
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* Use quote includes for yosys.hKevin Kiningham2017-12-132-2/+2
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* Add support for editline as replacement for readlineClifford Wolf2017-11-082-10/+29
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* Add src arguments to all cell creator helper functionsClifford Wolf2017-09-092-209/+244
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* Update more stuff to use get_src_attribute() and set_src_attribute()Clifford Wolf2017-09-011-1/+1
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* Merge remote-tracking branch 'upstream/master'Jason Lowdermilk2017-08-302-0/+20
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| * Add {get,set}_src_attribute() methods on RTLIL::AttrObjectClifford Wolf2017-08-302-0/+20
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* | fix indent levelJason Lowdermilk2017-08-301-2/+2
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* | Add support for source line tracking through synthesis phaseJason Lowdermilk2017-08-292-21/+22
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* Add hashlib support for hashing of poolsClifford Wolf2017-08-221-0/+7
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* Add consteval support for $_ANDNOT_ and $_ORNOT_Clifford Wolf2017-08-221-0/+4
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* Add Const methods is_fully_zero(), is_fully_def(), and is_fully_undef()Clifford Wolf2017-08-182-0/+37
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* Auto-detect JSON front-endClifford Wolf2017-08-091-0/+2
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* Add log_warning_noprefix() API, Use for Verific warnings and errorsClifford Wolf2017-07-272-0/+36
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* Add "using std::get" to yosys.hClifford Wolf2017-07-251-0/+1
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* Change intptr_t to uintptr_t in hashlib.hClifford Wolf2017-07-181-1/+1
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* Fix build warnings for win64Robert Ou2017-07-171-1/+1
| | | | Win64 has a 32-bit long. Use intptr_t to work on any data model.
* Fix history namespace collisionClifford Wolf2017-06-201-10/+10
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* Store command history when terminating with an errorClifford Wolf2017-06-203-17/+31
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* Add "setundef -anyseq"Clifford Wolf2017-05-281-12/+12
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* Enable readline and tcl in mxe buildsClifford Wolf2017-05-171-0/+10
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* Add missing AndnotGate() and OrnotGate() declarations to rtlil.hClifford Wolf2017-05-171-13/+15
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* Add $_ANDNOT_ and $_ORNOT_ gatesClifford Wolf2017-05-176-55/+94
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* Add ConstEval defaultval featureClifford Wolf2017-04-051-1/+8
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* Add front-end detection for *.tcl filesClifford Wolf2017-03-281-1/+6
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* Add $live and $fair cell types, add support for s_eventually keywordClifford Wolf2017-02-253-1/+21
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* Fix mingw compile issue (2nd attempt)Clifford Wolf2017-02-231-2/+2
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* Fix mingw compile issue (maybe.. I can't test it)Clifford Wolf2017-02-231-2/+2
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* Fix eval implementation of $_NOR_Clifford Wolf2017-02-161-1/+1
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* Add "yosys -w" for suppressing warningsClifford Wolf2017-02-123-11/+34
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* Add log_wire() APIClifford Wolf2017-02-112-0/+8
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* Fix undef propagation bug in $pmux SAT modelClifford Wolf2017-02-051-14/+4
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* Add $cover cell type and SVA cover() supportClifford Wolf2017-02-043-1/+11
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* Fix RTLIL::Memory::start_offset initializationClifford Wolf2017-01-251-0/+1
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* Bugfix in RTLIL::SigSpec::remove2()Clifford Wolf2016-12-311-3/+4
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* Simplified log_spacer() codeClifford Wolf2016-12-231-6/+2
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* Added "yosys -W regex"Clifford Wolf2016-12-223-2/+44
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* Added AIGER back-end to automatic back-end detectionClifford Wolf2016-12-211-0/+2
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* Bugfix in comment handlingClifford Wolf2016-12-131-1/+1
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* Remember global declarations and defines accross read_verilog callsClifford Wolf2016-11-152-1/+4
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* Some minor build fixes for Visual CClifford Wolf2016-10-142-1/+5
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* Added $anyseq cell typeClifford Wolf2016-10-144-3/+19
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* Added $global_clock verilog syntax support for creating $ff cellsClifford Wolf2016-10-141-1/+2
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* Added $ff and $_FF_ cell typesClifford Wolf2016-10-124-1/+31
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* define PATH_MAX if not defined by limits.hClifford Wolf2016-10-111-0/+5
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* Improvements in assertpmuxClifford Wolf2016-09-072-0/+19
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