diff options
| author | Clifford Wolf <clifford@clifford.at> | 2016-12-31 16:14:42 +0100 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2016-12-31 16:14:42 +0100 |
| commit | 6b2c23c7216468693fce3ba32dc528126010db5c (patch) | |
| tree | d4986c5519005467e9a9617d40962b9b5e6fb243 /kernel | |
| parent | 7da7a6d1df5bc1461ed3c15557463d221e90f434 (diff) | |
| download | yosys-6b2c23c7216468693fce3ba32dc528126010db5c.tar.gz yosys-6b2c23c7216468693fce3ba32dc528126010db5c.tar.bz2 yosys-6b2c23c7216468693fce3ba32dc528126010db5c.zip | |
Bugfix in RTLIL::SigSpec::remove2()
Diffstat (limited to 'kernel')
| -rw-r--r-- | kernel/rtlil.cc | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/kernel/rtlil.cc b/kernel/rtlil.cc index 7693e3052..40ad8ca13 100644 --- a/kernel/rtlil.cc +++ b/kernel/rtlil.cc @@ -2766,10 +2766,11 @@ void RTLIL::SigSpec::remove2(const RTLIL::SigSpec &pattern, RTLIL::SigSpec *othe other->unpack(); } - for (int i = GetSize(bits_) - 1; i >= 0; i--) { + for (int i = GetSize(bits_) - 1; i >= 0; i--) + { if (bits_[i].wire == NULL) continue; - for (auto &pattern_chunk : pattern.chunks()) { + for (auto &pattern_chunk : pattern.chunks()) if (bits_[i].wire == pattern_chunk.wire && bits_[i].offset >= pattern_chunk.offset && bits_[i].offset < pattern_chunk.offset + pattern_chunk.width) { @@ -2779,8 +2780,8 @@ void RTLIL::SigSpec::remove2(const RTLIL::SigSpec &pattern, RTLIL::SigSpec *othe other->bits_.erase(other->bits_.begin() + i); other->width_--; } + break; } - } } check(); |