| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Now only use value from "initial" when no matching "always" block is found | Clifford Wolf | 2013-03-31 | 1 | -1/+1 |
| * | Added AST_INITIAL (before verilog "initial" was mapped to AST_ALWAYS) | Clifford Wolf | 2013-03-31 | 1 | -0/+1 |
| * | Implemented proper handling of stub placeholder modules | Clifford Wolf | 2013-03-28 | 1 | -3/+3 |
| * | Added nosync attribute and some async reset related fixes | Clifford Wolf | 2013-03-25 | 1 | -1/+1 |
| * | Added mem2reg option to verilog frontend | Clifford Wolf | 2013-03-24 | 1 | -4/+4 |
| * | Improved mem2reg handling in ast simplifier | Clifford Wolf | 2013-03-24 | 1 | -1/+1 |
| * | Added support for verilog genblock[index].member syntax | Clifford Wolf | 2013-02-26 | 1 | -0/+1 |
| * | initial import | Clifford Wolf | 2013-01-05 | 1 | -0/+228 |
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index : iCE40/yosys | |
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