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Age
Files
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*
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Check that whiteboxes are synthesisable
Eddie Hung
2019-06-14
1
-4
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+8
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Get rid of compiler warnings
Eddie Hung
2019-06-14
1
-2
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+2
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Cover __APPLE__ too for little to big endian
Eddie Hung
2019-06-14
1
-4
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+9
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Further cleanup based on @daveshah1
Eddie Hung
2019-06-14
1
-27
/
+21
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Resolve comments from @daveshah1
Eddie Hung
2019-06-14
1
-14
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+8
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Remove WIP ABC9 flop support
Eddie Hung
2019-06-14
1
-33
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+33
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Cleanup
Eddie Hung
2019-06-14
1
-1
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+0
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Merge branch 'xaig' of github.com:YosysHQ/yosys into xaig
Eddie Hung
2019-06-14
1
-2
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+1
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ecp5: Add abc9 option
David Shah
2019-06-14
1
-2
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+1
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Cleanup/optimise toposort in write_xaiger
Eddie Hung
2019-06-14
1
-54
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+47
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Remove unnecessary undriven_bits.insert
Eddie Hung
2019-06-12
1
-4
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+1
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write_xaiger to preserve POs even if driven by constant
Eddie Hung
2019-06-12
1
-7
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+6
*
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Add a couple more tests
Eddie Hung
2019-06-12
1
-21
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+18
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More write_xaiger cleanup
Eddie Hung
2019-06-12
1
-40
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+12
*
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Cleanup write_xaiger
Eddie Hung
2019-06-12
1
-92
/
+6
*
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Consistency
Eddie Hung
2019-06-12
1
-1
/
+1
*
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Add log_assert to ensure no loops
Eddie Hung
2019-06-04
1
-1
/
+15
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Only toposort builtin and abc types
Eddie Hung
2019-06-04
1
-6
/
+9
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When creating new holes cell, inherit parameters too
Eddie Hung
2019-06-03
1
-1
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+3
*
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ABC9 to understand flops
Eddie Hung
2019-05-31
1
-46
/
+27
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Merge branch 'xaig' into xc7mux
Eddie Hung
2019-05-31
1
-8
/
+79
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Fix abc9 with (* keep *) wires
Eddie Hung
2019-04-23
1
-6
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+14
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*
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Revert "Temporarily remove 'r' extension"
Eddie Hung
2019-04-22
1
-7
/
+77
*
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Fix issue where keep signal became PI, but also box was adding CI driver
Eddie Hung
2019-05-30
1
-5
/
+19
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Do not re-sort box_module ports
Eddie Hung
2019-05-30
1
-4
/
+6
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Carry in/out to be the last input/output for chains to be preserved
Eddie Hung
2019-05-30
1
-0
/
+38
*
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Fix abc_test024
Eddie Hung
2019-05-29
1
-4
/
+5
*
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Fix for abc9_test022
Eddie Hung
2019-05-28
1
-2
/
+6
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Small improvement
Eddie Hung
2019-05-28
1
-4
/
+2
*
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Update from master
Eddie Hung
2019-05-28
1
-59
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+56
*
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Map file to include boxes not CI/CO
Eddie Hung
2019-05-27
1
-45
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+38
*
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Instantiate cell type (from sym file) otherwise 'clean' warnings
Eddie Hung
2019-05-27
1
-2
/
+4
*
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Add 'cinput' and 'coutput' to symbols file for boxes
Eddie Hung
2019-05-27
1
-34
/
+24
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Fix "a" connectivity
Eddie Hung
2019-05-26
1
-5
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+30
*
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Fix padding, remove CIs from undriven_bits before erasing undriven POs
Eddie Hung
2019-05-26
1
-14
/
+8
*
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Fix "a" extension
Eddie Hung
2019-05-26
1
-8
/
+18
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Fix "write_xaiger", and to write each box contents into holes
Eddie Hung
2019-05-25
1
-39
/
+62
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Merge remote-tracking branch 'origin/master' into xc7mux
Eddie Hung
2019-05-25
2
-7
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+27
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Fix handling of offset and upto module ports in write_blif, fixes #1040
Clifford Wolf
2019-05-25
1
-6
/
+20
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*
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Add proper error message for btor recursion_guard
Clifford Wolf
2019-05-24
1
-1
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+7
*
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Merge remote-tracking branch 'origin/eddie/opt_rmdff' into xc7mux
Eddie Hung
2019-05-23
1
-3
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+7
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*
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Fix static shift operands, neg result type, minor formatting
Jim Lawson
2019-05-21
1
-3
/
+7
*
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Pad all boxes so that all input/output connections specified
Eddie Hung
2019-05-21
1
-22
/
+67
*
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Merge remote-tracking branch 'origin/master' into xc7mux
Eddie Hung
2019-05-21
3
-11
/
+129
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*
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Merge pull request #991 from kristofferkoch/gcc9-warnings
Clifford Wolf
2019-05-08
1
-1
/
+2
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Fix all warnings that occurred when compiling with gcc9
Kristoffer Ellersgaard Koch
2019-05-08
1
-1
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+2
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*
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Fix handling of partial init attributes in write_verilog, fixes #997
Clifford Wolf
2019-05-07
1
-1
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+2
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*
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Add "real" keyword to ilang format
Clifford Wolf
2019-05-06
1
-1
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+4
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Improve write_verilog specify support
Clifford Wolf
2019-05-04
1
-15
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+71
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Merge remote-tracking branch 'origin/master' into clifford/specify
Eddie Hung
2019-05-03
1
-25
/
+62
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