Commit message (Expand) | Author | Age | Files | Lines | |
---|---|---|---|---|---|
* | Add $_NMUX_, add "abc -g cmos", add proper cmos cell costs | Clifford Wolf | 2019-08-06 | 1 | -0/+7 |
* | Add "whitebox" attribute, add "read_verilog -wb" | Clifford Wolf | 2019-04-18 | 1 | -1/+1 |
* | Minor update | Aman Goel | 2018-10-15 | 1 | -1/+1 |
* | Update to .smv backend | Aman Goel | 2018-10-01 | 1 | -33/+52 |
* | Consistent use of 'override' for virtual methods in derived classes. | Henner Zeller | 2018-07-20 | 1 | -2/+2 |
* | Add $_ANDNOT_ and $_ORNOT_ gates | Clifford Wolf | 2017-05-17 | 1 | -3/+7 |
* | Added "yosys -D" feature | Clifford Wolf | 2016-04-21 | 1 | -1/+1 |
* | Import more std:: stuff into Yosys namespace | Clifford Wolf | 2015-10-25 | 1 | -5/+5 |
* | Added SMV back-end 'test_cells.sh' script | Clifford Wolf | 2015-08-12 | 1 | -0/+33 |
* | Bugfix in SMV back-end for partially unassigned wires | Clifford Wolf | 2015-08-05 | 1 | -4/+16 |
* | Added $assert support to SMV back-end | Clifford Wolf | 2015-08-04 | 1 | -4/+21 |
* | Fixed trailing whitespaces | Clifford Wolf | 2015-07-02 | 1 | -2/+2 |
* | Added init support to SMV back-end | Clifford Wolf | 2015-06-19 | 1 | -1/+3 |
* | Progress in SMV back-end | Clifford Wolf | 2015-06-19 | 1 | -64/+115 |
* | Progress in SMV back-end | Clifford Wolf | 2015-06-19 | 1 | -13/+59 |
* | Progress in SMV back-end | Clifford Wolf | 2015-06-18 | 1 | -24/+94 |
* | Progress in SMV back-end | Clifford Wolf | 2015-06-17 | 1 | -11/+72 |
* | Progress in SMV back-end | Clifford Wolf | 2015-06-17 | 1 | -11/+64 |
* | Progress in SMV back-end | Clifford Wolf | 2015-06-16 | 1 | -3/+46 |
* | Progress in SMV back-end | Clifford Wolf | 2015-06-15 | 1 | -2/+95 |
* | Progress in SMV back-end | Clifford Wolf | 2015-06-15 | 1 | -7/+85 |
* | Added "write_smv" skeleton | Clifford Wolf | 2015-06-15 | 2 | -0/+261 |