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* | Add comment on default flop initEddie Hung2019-10-071-0/+1
* | Get rid of output_port lookupEddie Hung2019-10-071-14/+8
* | Do not require changes to cells_sim.v; try and work out comb modelEddie Hung2019-10-051-48/+70
* | Error if $currQ not foundEddie Hung2019-10-051-0/+4
* | Fix merge issuesEddie Hung2019-10-041-1/+1
* | Merge remote-tracking branch 'origin/eddie/abc_to_abc9' into xaig_dffEddie Hung2019-10-041-11/+11
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| * Rename abc_* names/attributes to more precisely be abc9_*Eddie Hung2019-10-041-9/+9
* | No need to punch ports at allEddie Hung2019-09-301-0/+24
* | Remove need for $currQ port connectionEddie Hung2019-09-301-3/+3
* | CleanupEddie Hung2019-09-301-100/+3
* | Use a cell_cache to instantiate once rather than opt_merge callEddie Hung2019-09-301-15/+15
* | scc call on active module module only, plus cleanupEddie Hung2019-09-301-8/+12
* | Use derived moduleEddie Hung2019-09-301-22/+5
* | Merge remote-tracking branch 'origin/master' into xaig_dffEddie Hung2019-09-291-8/+8
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| * Merge pull request #1359 from YosysHQ/xc7dspEddie Hung2019-09-291-8/+8
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| | * "abc_padding" attr for blackbox outputs that were padded, remove them laterEddie Hung2019-09-231-1/+6
| | * Force $inout.out ports to begin with '$' to indicate internalEddie Hung2019-09-231-1/+1
| | * When two boxes connect to each other, need not be a (* keep *)Eddie Hung2019-09-191-6/+1
* | | Merge remote-tracking branch 'origin/master' into xaig_dffEddie Hung2019-09-292-2/+2
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| * | Add aiger and protobuf backends binary supportMiodrag Milanovic2019-09-281-1/+1
| * | Support binary files for backends, fixes #1407Miodrag Milanovic2019-09-281-1/+1
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* | Big rework; flop info now mostly in cells_sim.vEddie Hung2019-09-281-62/+93
* | Use abc_mergeability attr for "r" extensionEddie Hung2019-09-271-58/+66
* | Fix infinite recursionEddie Hung2019-09-271-1/+1
* | Merge remote-tracking branch 'origin/master' into xaig_dffEddie Hung2019-09-272-8/+27
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| * Add "write_aiger -L"Clifford Wolf2019-09-181-5/+16
| * Recognise built-in types (e.g. $_DFF_*)Eddie Hung2019-08-301-3/+3
| * Revert "Revert "Fix omode which inserts an output if none exists (otherwise a...Eddie Hung2019-08-281-7/+8
| * Revert "Output "h" extension only if boxes"Eddie Hung2019-08-281-32/+28
| * Output "h" extension only if boxesEddie Hung2019-08-211-28/+32
| * Revert "Fix omode which inserts an output if none exists (otherwise abc9 brea...Eddie Hung2019-08-211-8/+7
| * Fix omode which inserts an output if none exists (otherwise abc9 breaks)Eddie Hung2019-08-201-7/+8
| * Revert "Only xaig if GetSize(output_bits) > 0"Eddie Hung2019-08-201-149/+147
| * Only xaig if GetSize(output_bits) > 0Eddie Hung2019-08-201-147/+149
* | Revert "Remove sequential extension"Eddie Hung2019-08-201-29/+270
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* Remove sequential extensionEddie Hung2019-08-201-270/+29
* Do not sigmap!Eddie Hung2019-08-201-2/+2
* Minor refactorEddie Hung2019-08-201-7/+6
* Output i/o/h extensions even if no boxes or flopsEddie Hung2019-08-191-65/+66
* Add (* abc_arrival *) attributeEddie Hung2019-08-191-9/+66
* Merge remote-tracking branch 'origin/master' into xaig_dffEddie Hung2019-08-191-1/+1
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| * Fix various NDEBUG compiler warnings, closes #1255Clifford Wolf2019-08-131-1/+1
* | Use %dEddie Hung2019-08-191-1/+1
* | Merge branch 'eddie/abc9_refactor' into xaig_dffEddie Hung2019-08-161-62/+25
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| * | Compute abc_scc_break and move CI/CO outside of each abc9Eddie Hung2019-08-161-42/+0
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| * Merge pull request #1258 from YosysHQ/eddie/cleanupClifford Wolf2019-08-101-5/+5
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| | * RTLIL::S{0,1} -> State::S{0,1}Eddie Hung2019-08-061-5/+5
| * | Run "clean -purge" on holes_module in its own designEddie Hung2019-08-071-6/+11
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| * Merge pull request #1238 from mmicko/vsbuild_fixClifford Wolf2019-08-021-1/+1
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| | * Visual Studio build fixMiodrag Milanovic2019-07-311-1/+1
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