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| * | | cxxrtl: rename "elision" to "inlining". NFC.whitequark2020-12-131-77/+77
| | | | | | | | | | | | | | | | | | | | | | | | | | | | "Elision" in this context is an unusual and not very descriptive term whereas "inlining" is common and straightforward. Also, introducing "inlining" makes it easier to introduce its dual under the obvious name "outlining".
| * | | cxxrtl: fix outdated comment. NFC.whitequark2020-12-131-2/+2
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| * | | cxxrtl: use IdString::isPublic(). NFC.whitequark2020-12-131-4/+4
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| * | | kernel: make IdString::isPublic() const.whitequark2020-12-121-1/+1
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* | | | Bump versionYosys Bot2020-12-181-1/+1
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* | | | xilinx: Add FDDRCPE and FDDRRSE blackbox cells.Marcelina Kościelnicka2020-12-172-0/+33
| |/ / |/| | | | | | | | | | | These are necessary primitives for proper DDR support on Virtex 2 and Spartan 3.
* | | Bump versionYosys Bot2020-12-151-1/+1
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* | | timinginfo: Error instead of segfault on const signals.Marcelina Kościelnicka2020-12-151-2/+2
| | | | | | | | | | | | Reported by @Ravenslofty
* | | Bump versionYosys Bot2020-12-131-1/+1
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* | Merge pull request #2485 from whitequark/cxxrtl-cell-input-bufferingwhitequark2020-12-122-25/+33
|\ \ | | | | | | cxxrtl: don't overwrite buffered inputs
| * | cxxrtl: don't overwrite buffered inputs.whitequark2020-12-112-25/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Before this commit, a cell's input was always assigned like: p_cell.p_input = (value...); If `p_input` is buffered (e.g. if the design is built at -O0), this is not correct. (In practice, this breaks clocking.) Unfortunately, the incorrect design was compiled without diagnostics because wire<> was move-assignable and also implicitly constructible from value<>. After this commit, cell inputs are no longer incorrectly assumed to always be unbuffered, and wires are not assignable from values.
* | | Bump versionYosys Bot2020-12-101-1/+1
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* | | Merge pull request #2483 from YosysHQ/pmgen_nice_errorMiodrag Milanović2020-12-091-2/+6
|\ \ \ | | | | | | | | Return nice error in pmgen generated code, fixes #2482
| * | | Return nice error in pmgen generated code, fixes #2482Miodrag Milanovic2020-12-091-2/+6
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* / / Bump versionYosys Bot2020-12-091-1/+1
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* | Merge pull request #2478 from whitequark/improve-bugpointwhitequark2020-12-082-19/+101
|\ \ | |/ |/| bugpoint: various improvements
| * bugpoint: add -wires option.whitequark2020-12-072-4/+39
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| * bugpoint: try to remove whole processes first.whitequark2020-12-071-4/+40
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| * bugpoint: accept quoted strings in -grep.whitequark2020-12-071-1/+4
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| * bugpoint: add -command option.whitequark2020-12-071-13/+21
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* Bump versionYosys Bot2020-12-041-1/+1
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* Merge pull request #2470 from whitequark/cxxrtl-create_atwhitequark2020-12-032-1/+20
|\ | | | | cxxrtl: allow customizing the root module path in the C API
| * cxxrtl: allow customizing the root module path in the C API.whitequark2020-12-032-1/+20
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* Bump versionYosys Bot2020-12-031-1/+1
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* Merge pull request #2468 from whitequark/cxxrtl-assertwhitequark2020-12-022-2/+16
|\ | | | | cxxrtl: use CXXRTL_ASSERT for RTL contract violations instead of assert
| * cxxrtl: use CXXRTL_ASSERT for RTL contract violations instead of assert.whitequark2020-12-022-2/+16
| | | | | | | | | | | | | | | | RTL contract violations and C++ contract violations are different: the former depend on the netlist and will never violate memory safety whereas the latter may. When loading a CXXRTL simulation into another process, RTL contract violations should generally not crash it, while C++ contract violations should.
* | Merge pull request #2469 from whitequark/cxxrtl-no-clkwhitequark2020-12-021-6/+14
|\ \ | | | | | | cxxrtl: fix crashes caused by a floating or constant clock input
| * | cxxrtl: fix crashes caused by a floating or constant clock input.whitequark2020-12-021-6/+14
| |/ | | | | | | | | | | | | | | | | | | | | E.g. in: module test; wire clk = 0; reg data; always @(posedge clk) data <= 0; endmodule
* | Merge pull request #2466 from whitequark/cxxrtl-resetwhitequark2020-12-024-3/+78
|\ \ | | | | | | cxxrtl: provide a way to perform unobtrusive power-on reset
| * | cxxrtl: provide a way to perform unobtrusive power-on reset.whitequark2020-12-024-3/+78
| |/ | | | | | | | | | | | | | | | | | | | | Although it is always possible to destroy and recreate the design to simulate a power-on reset, this has two drawbacks: * Black boxes are also destroyed and recreated, which causes them to reacquire their resources, which might be costly and/or erase important state. * Pointers into the design are invalidated and have to be acquired again, which is costly and might be very inconvenient if they are captured elsewhere (especially through the C API).
* | Merge pull request #2456 from Zottel/masterwhitequark2020-12-021-0/+1
|\ \ | | | | | | Return correct modname when found in cache.
| * | Return correct modname when found in cache.Julius Roob2020-11-261-0/+1
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* | | Merge pull request #2455 from gsomlo/gls-fedpkg-fixeswhitequark2020-12-022-0/+6
|\ \ \ | | | | | | | | Fixes for building Fedora distro RPMs of yosys
| * | | fixup over commit 829b5cca to re-enable ABCEXTERNAL supportGabriel Somlo2020-11-261-0/+5
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| * | | Add #include needed to build with gcc-11Gabriel Somlo2020-11-261-0/+1
| |/ / | | | | | | | | | Suggested by Jeff Law <law@redhat.com>
* | | Merge pull request #2467 from YosysHQ/dave/nexus-carry-fixDavid Shah2020-12-021-2/+2
|\ \ \ | | | | | | | | nexus: More efficient CO mapping
| * | | nexus: More efficient CO mappingDavid Shah2020-12-021-2/+2
| | | | | | | | | | | | | | | | Signed-off-by: David Shah <dave@ds0.me>
* | | | Merge pull request #2446 from RobertBaruch/rtlil_formatwhitequark2020-12-023-0/+307
|\ \ \ \ | | | | | | | | | | Adds appendix on RTLIL text format
| * | | | Further juggles the wording of "character".Robert Baruch2020-11-251-1/+1
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| * | | | Clarifies how character encodings work.Robert Baruch2020-11-251-5/+5
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| * | | | Clarifies whitespace and eol.Robert Baruch2020-11-251-2/+6
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| * | | | Cleans up doublequotesRobert Baruch2020-11-251-2/+2
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| * | | | Clarifies use of integers, and character set.Robert Baruch2020-11-251-4/+12
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| * | | | Clarifies processes, corrects some attributesRobert Baruch2020-11-251-29/+46
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| * | | | Refactors for attributes.Robert Baruch2020-11-241-50/+50
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| * | | | Cleans up some descriptions and syntaxRobert Baruch2020-11-241-25/+43
| | | | | | | | | | | | | | | Now all rules ending in "-stmt" end in eol.
| * | | | Adds missing "end" and eol to module.Robert Baruch2020-11-221-1/+1
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| * | | | Update to Values #2Robert Baruch2020-11-221-1/+1
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| * | | | Update to Values sectionRobert Baruch2020-11-221-2/+2
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| * | | | Adds appendix on RTLIL text formatRobert Baruch2020-11-223-0/+260
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