| Commit message (Expand) | Author | Age | Files | Lines | ||
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| | * | | | | | | | Add support for non-power-of-two mem chunks in verific importer | Claire Wolf | 2020-05-14 | 1 | -2/+12 | |
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| * | | | | | | | Merge pull request #2050 from YosysHQ/eddie/opt_clean_fixes | Claire Wolf | 2020-05-14 | 2 | -12/+32 | |
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| | * | | | | | | | opt_clean: improve warning message | Eddie Hung | 2020-05-14 | 2 | -2/+2 | |
| | * | | | | | | | opt_clean: add init test | Eddie Hung | 2020-05-14 | 1 | -0/+13 | |
| | * | | | | | | | opt_clean: rminit without -purge; also remove if consistent with const.. | Eddie Hung | 2020-05-14 | 1 | -9/+17 | |
| | * | | | | | | | opt_clean: really make 'clean' identical to 'opt_clean' by rminit too | Eddie Hung | 2020-05-14 | 1 | -3/+2 | |
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| * | | | | | | | Merge pull request #2027 from YosysHQ/eddie/verilog_neg_upto | Claire Wolf | 2020-05-14 | 4 | -8/+35 | |
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| | * | | | | | | techlibs/common: more robustness when *_WIDTH = 0 | Eddie Hung | 2020-05-05 | 3 | -8/+30 | |
| | * | | | | | | ast: swap range regardless of range_left >= 0 | Eddie Hung | 2020-05-04 | 1 | -1/+1 | |
| | * | | | | | | test: add failing test | Eddie Hung | 2020-05-04 | 1 | -0/+5 | |
| * | | | | | | | ice40: fix ICESTORM_LC process sensitivity | Eddie Hung | 2020-05-12 | 1 | -1/+1 | |
| * | | | | | | | ice40: fix whitespace | Eddie Hung | 2020-05-12 | 1 | -15/+14 | |
| * | | | | | | | ecp5: Add missing SERDES parameters | David Shah | 2020-05-12 | 1 | -0/+4 | |
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| * | | | | | | Merge pull request #2038 from nakengelhardt/no-libdir-flag | Claire Wolf | 2020-05-08 | 1 | -2/+1 | |
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| | * | | | | | | Remove yosys libdir from LDFLAGS (and fix a typo) | N. Engelhardt | 2020-05-07 | 1 | -2/+1 | |
| * | | | | | | | Fix clang compiler warning | Claire Wolf | 2020-05-08 | 1 | -2/+2 | |
| * | | | | | | | Merge pull request #2022 from Xiretza/fallthroughs | whitequark | 2020-05-08 | 5 | -9/+26 | |
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| | * | | | | | | | Reorder cases to avoid fall-through warning | Xiretza | 2020-05-07 | 1 | -3/+3 | |
| | * | | | | | | | Add YS_FALLTHROUGH macro to mark case fall-through | Xiretza | 2020-05-07 | 5 | -6/+23 | |
| * | | | | | | | | intel_alm: direct LUTRAM cell instantiation | Dan Ravensloft | 2020-05-07 | 9 | -52/+163 | |
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| * | | | | | | | Merge pull request #2005 from YosysHQ/claire/fix1990 | Claire Wolf | 2020-05-07 | 9 | -19/+142 | |
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| | * | | | | | | | Fix the other "opt_expr -fine" bug introduced in 213a89558 | Claire Wolf | 2020-05-02 | 1 | -7/+19 | |
| | * | | | | | | | Add plusargs for output files in test_autotb output | Claire Wolf | 2020-05-02 | 1 | -3/+10 | |
| | * | | | | | | | Bugfix in partsel.v signed indices test cases | Claire Wolf | 2020-05-02 | 1 | -2/+2 | |
| | * | | | | | | | Fix handling of signed indices in bit slices | Claire Wolf | 2020-05-02 | 1 | -3/+8 | |
| | * | | | | | | | Add tests based on the test case from #1990 | Claire Wolf | 2020-05-02 | 1 | -0/+46 | |
| | * | | | | | | | Add AST_SELFSZ and improve handling of bit slices | Claire Wolf | 2020-05-02 | 5 | -7/+22 | |
| | * | | | | | | | Add "nowrshmsk" attribute, fix shift-and-mask bit slice write for signed offs... | Claire Wolf | 2020-05-02 | 6 | -7/+57 | |
| * | | | | | | | | Merge pull request #2034 from YosysHQ/eddie/abc_remote | Eddie Hung | 2020-05-07 | 1 | -1/+1 | |
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| | * | | | | | | | Makefile: git fetch all commits from $(ABCURL) repo | Eddie Hung | 2020-05-06 | 1 | -1/+1 | |
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| * | | | | | | | Merge pull request #2028 from zachjs/master | Eddie Hung | 2020-05-06 | 3 | -1/+23 | |
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| | * | | | | | | verilog: allow null gen-if then block | Zachary Snow | 2020-05-06 | 3 | -1/+23 | |
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| * | | | | | | Merge pull request #2025 from YosysHQ/eddie/frontend_cleanup | Eddie Hung | 2020-05-05 | 7 | -31/+34 | |
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| | * | | | | | | frontend: cleanup to use more ID::*, more dict<> instead of map<> | Eddie Hung | 2020-05-04 | 7 | -31/+34 | |
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| * | | | | | | Merge pull request #2012 from whitequark/fix-wasi-abc-build | whitequark | 2020-05-05 | 1 | -3/+3 | |
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| | * | | | | | | Update ABC to include WASI support fixes. | whitequark | 2020-05-02 | 1 | -1/+1 | |
| | * | | | | | | Fix WASI builds with abc enabled. | whitequark | 2020-05-01 | 1 | -2/+2 | |
| * | | | | | | | Merge pull request #2026 from YosysHQ/eddie/scratchpad_abc9_W | Eddie Hung | 2020-05-05 | 3 | -11/+34 | |
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| | * | | | | | | | synth_ice40/ecp5/xilinx: allow abc9.W to be overridden via scratchpad | Eddie Hung | 2020-05-04 | 3 | -11/+34 | |
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| * | | | | | | | Merge pull request #2024 from YosysHQ/eddie/primitive_src | Eddie Hung | 2020-05-05 | 3 | -2/+22 | |
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| | * | | | | | | | verilog: set src attribute for primitives | Eddie Hung | 2020-05-04 | 2 | -2/+6 | |
| | * | | | | | | | tests: add tests for primitives' src | Eddie Hung | 2020-05-04 | 1 | -0/+16 | |
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| * | | | | | | | Merge pull request #2023 from YosysHQ/eddie/specify_src | Eddie Hung | 2020-05-05 | 2 | -18/+26 | |
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| | * | | | | | | verilog: fix specify src attribute | Eddie Hung | 2020-05-04 | 2 | -18/+26 | |
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| * | | | | | | Merge pull request #1996 from boqwxp/rtlil_source_locations | Eddie Hung | 2020-05-04 | 1 | -13/+13 | |
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| | * | | | | | frontend: Include complete source location instead of just `location.first_li... | Alberto Gonzalez | 2020-05-01 | 1 | -13/+13 | |
| * | | | | | | Merge pull request #2000 from whitequark/log_error-trap | whitequark | 2020-05-03 | 2 | -3/+44 | |
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| | * | | | | | | kernel: Trap in `log_error()` when a debugger is attached. | whitequark | 2020-05-03 | 2 | -3/+44 | |
| * | | | | | | | Merge pull request #2014 from YosysHQ/claire/fixoptalu | Claire Wolf | 2020-05-03 | 2 | -7/+31 | |
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| | * | | | | | | | test: add test for #2014 | Eddie Hung | 2020-05-02 | 1 | -0/+12 | |
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index : iCE40/yosys | |
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