iCE40/yosys - [no description]

	Commit message (Expand)	Author	Age	Files	Lines
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* \|	Added EDIF backend support for multi-bit cell ports	Clifford Wolf	2015-02-01	1	-11/+10
* \|	Added missing ports and parameters to xilinx brams	Clifford Wolf	2015-02-01	1	-4/+18
* \|	Added "make mklibyosys", some minor API changes	Clifford Wolf	2015-02-01	7	-11/+70
* \|	Minor README changes	Clifford Wolf	2015-02-01	1	-3/+2
* \|	Removed TODO list from README file	Clifford Wolf	2015-02-01	1	-30/+0
* \|	Added yosys_banner(), Updated Copyright range	Clifford Wolf	2015-02-01	4	-26/+31
* \|	Added <algorithm> include to hashlib.h	Clifford Wolf	2015-02-01	1	-0/+1
* \|	Using selections in "ls" command	Clifford Wolf	2015-02-01	1	-34/+30
* \|	Shorter "dump" options	Clifford Wolf	2015-01-31	1	-4/+4
* \|	Bugfix in opt_const $eq -> buffer code	Clifford Wolf	2015-01-31	1	-4/+4
* \|	Log msg change	Clifford Wolf	2015-01-31	1	-1/+1
* \|	Fixed equiv_make for partially undriven nets (e.g. after "clean -purge")	Clifford Wolf	2015-01-31	1	-12/+31
* \|	Added "equiv_induct -undef"	Clifford Wolf	2015-01-31	2	-6/+51
* \|	Added "equiv_simple -undef"	Clifford Wolf	2015-01-31	2	-17/+61
* \|	Added "equiv_make -blacklist <file> -encfile <file>"	Clifford Wolf	2015-01-31	4	-5/+189
* \|	Synced RTLIL::unescape_id() to log_id() behavior	Clifford Wolf	2015-01-30	1	-3/+9
* \|	Added "fsm -encfile"	Clifford Wolf	2015-01-30	3	-14/+50
* \|	More log_id() stuff	Clifford Wolf	2015-01-30	1	-3/+7
* \|	Some cleanups in log.cc	Clifford Wolf	2015-01-30	1	-14/+16
* \|	Improved an error message	Clifford Wolf	2015-01-28	1	-1/+1
* \|	Fixed bug in equiv_miter	Clifford Wolf	2015-01-28	1	-6/+6
* \|	Added "sat -show-ports"	Clifford Wolf	2015-01-27	1	-2/+7
* \|	Bugfix in resource sharing test	Clifford Wolf	2015-01-27	1	-1/+1
* \|	Updaed ABC to hg rev 61ad5f908c03	Clifford Wolf	2015-01-27	1	-1/+1
* \|	Rethrow with "catch(...) throw;"	Clifford Wolf	2015-01-25	3	-6/+6
* \|	Added equiv_remove	Clifford Wolf	2015-01-25	2	-0/+84
* \|	Added equiv_miter	Clifford Wolf	2015-01-25	2	-0/+344
* \|	Added ENABLE_NDEBUG makefile options	Clifford Wolf	2015-01-24	12	-12/+33
* \|	Added #ifdef NDEBUG for log_assert()	Clifford Wolf	2015-01-24	1	-1/+5
* \|	Fixed xilinx FDSE sim model	Clifford Wolf	2015-01-24	1	-2/+2
* \|	Various equiv_* improvements	Clifford Wolf	2015-01-24	4	-14/+20
* \|	Added dict/pool.sort()	Clifford Wolf	2015-01-24	7	-50/+80
* \|	Improvements in equiv_make, equiv_induct	Clifford Wolf	2015-01-22	2	-0/+46
* \|	Improved xdot calling	Clifford Wolf	2015-01-22	1	-2/+2
* \|	Added equiv_induct	Clifford Wolf	2015-01-22	2	-0/+182
* \|	Various equiv_simple improvements	Clifford Wolf	2015-01-22	2	-25/+69
* \|	Moved equiv stuff to passes/equiv/	Clifford Wolf	2015-01-22	5	-3/+5
* \|	Progress in equiv_simple	Clifford Wolf	2015-01-21	2	-41/+110
* \|	Fixed opt_muxtree performance bug	Clifford Wolf	2015-01-21	1	-11/+28
* \|	Faster "make clean-abc"	Clifford Wolf	2015-01-20	1	-2/+2
* \|	README stuff	Clifford Wolf	2015-01-20	1	-2/+3
* \|	Added equiv_simple	Clifford Wolf	2015-01-19	2	-0/+188
* \|	Added equiv_status	Clifford Wolf	2015-01-19	2	-0/+95
* \|	Added equiv_make command	Clifford Wolf	2015-01-19	4	-1/+260
* \|	Added $equiv cell type	Clifford Wolf	2015-01-19	4	-2/+33
* \|	Merge branch 'master' of github.com:cliffordwolf/yosys	Clifford Wolf	2015-01-18	1	-0/+6
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\| * \	Merge pull request #47 from mschmoelzer/master	Clifford Wolf	2015-01-18	1	-0/+6
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\| \| * \|	Add "echo-yosys-ver" and "echo-git-rev" Makefile targets.	Martin Schmölzer	2015-01-18	1	-0/+6
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* \| \|	Various cleanups in xilinx techlib	Clifford Wolf	2015-01-18	7	-9/+110
* \| \|	Refactoring of memory_bram and xilinx brams	Clifford Wolf	2015-01-18	6	-674/+466
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