Commit message (Collapse) | Author | Age | Files | Lines | ||
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| * | | | | | | Merge pull request #1234 from mmicko/fix_gzip_no_exist | David Shah | 2019-07-29 | 1 | -19/+21 | |
| |\ \ \ \ \ \ | | |_|/ / / / | |/| | | | | | Fix case when file does not exist | |||||
| | * | | | | | Fix case when file does not exist | Miodrag Milanovic | 2019-07-29 | 1 | -19/+21 | |
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| * | | | | | Merge pull request #1226 from YosysHQ/dave/gzip | David Shah | 2019-07-27 | 8 | -13/+70 | |
| |\ \ \ \ \ | | |/ / / / | |/| | | | | Add support for gzip'd input files | |||||
| | * | | | | Update CHANGELOG | David Shah | 2019-07-26 | 1 | -1/+1 | |
| | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: David Shah <dave@ds0.me> | |||||
| | * | | | | Fix frontend auto-detection for gzipped input | David Shah | 2019-07-26 | 1 | -9/+12 | |
| | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: David Shah <dave@ds0.me> | |||||
| | * | | | | Add support for reading gzip'd input files | David Shah | 2019-07-26 | 6 | -3/+57 | |
| | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: David Shah <dave@ds0.me> | |||||
| * | | | | | Merge branch 'master' of github.com:YosysHQ/yosys | Eddie Hung | 2019-07-25 | 17 | -29/+360 | |
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| | * \ \ \ \ | Merge branch 'ZirconiumX-synth_intel_m9k' | Clifford Wolf | 2019-07-25 | 4 | -5/+11 | |
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| | | * | | | | | intel: Map M9K BRAM only on families that have it | Dan Ravensloft | 2019-07-23 | 4 | -5/+12 | |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This regresses Cyclone V and Cyclone 10 substantially, but these numbers were artificial, targeting a BRAM that they did not contain. Amusingly, synth_intel still does better when synthesizing PicoSoC than Quartus when neither are inferring block RAM. | |||||
| | * | | | | | | Merge pull request #1218 from ZirconiumX/synth_intel_iopads | Clifford Wolf | 2019-07-25 | 1 | -8/+8 | |
| | |\ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | intel: Make -noiopads the default | |||||
| | | * | | | | | | intel: Make -noiopads the default | Dan Ravensloft | 2019-07-24 | 1 | -8/+8 | |
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| | * | | | | | | Merge pull request #1219 from jakobwenzel/objIterator | Clifford Wolf | 2019-07-25 | 2 | -3/+20 | |
| | |\ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | made ObjectIterator comply with Iterator Interface | |||||
| | | * | | | | | | replaced std::iterator with using statements | Jakob Wenzel | 2019-07-25 | 1 | -6/+6 | |
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| | | * | | | | | | made ObjectIterator extend std::iterator | Jakob Wenzel | 2019-07-24 | 2 | -2/+19 | |
| | | |/ / / / / | | | | | | | | | | | | | | | | | | | | | | | | | this makes it possible to use std algorithms on them | |||||
| | * | | | | | | Merge pull request #1224 from YosysHQ/xilinx_fix_ff | Eddie Hung | 2019-07-25 | 1 | -2/+2 | |
| | |\ \ \ \ \ \ | | | |_|_|/ / / | | |/| | | | | | xilinx: Fix missing cell name underscore in cells_map.v | |||||
| | | * | | | | | xilinx: Fix missing cell name underscore in cells_map.v | David Shah | 2019-07-25 | 1 | -2/+2 | |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: David Shah <dave@ds0.me> | |||||
| | * | | | | | | Merge pull request #1222 from koriakin/s6-example | Eddie Hung | 2019-07-24 | 5 | -0/+47 | |
| | |\ \ \ \ \ \ | | | |_|/ / / / | | |/| | | | | | Add a simple example for Spartan 6 | |||||
| | | * | | | | | Add a simple example for Spartan 6 | Marcin KoĆcielnicki | 2019-07-24 | 5 | -0/+47 | |
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| | * | | | | | Merge pull request #1212 from YosysHQ/eddie/signed_ice40_dsp | Eddie Hung | 2019-07-23 | 3 | -9/+241 | |
| | |\ \ \ \ \ | | | | | | | | | | | | | | | | | ice40: Fix SB_MAC16 sim model for signed modes | |||||
| | * \ \ \ \ \ | Merge pull request #1214 from jakobwenzel/astmod_clone | Eddie Hung | 2019-07-22 | 1 | -0/+2 | |
| | |\ \ \ \ \ \ | | | |_|_|/ / / | | |/| | | | | | initialize noblackbox and nowb in AstModule::clone | |||||
| | | * | | | | | initialize noblackbox and nowb in AstModule::clone | Jakob Wenzel | 2019-07-22 | 1 | -0/+2 | |
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| | * | | | | | Add "stat -tech cmos" | Clifford Wolf | 2019-07-20 | 1 | -2/+29 | |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| * | | | | | | Bump abc to fix &mfs bug | Eddie Hung | 2019-07-25 | 1 | -1/+1 | |
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* | | | | | | Fix B_WIDTH > DSP_B_MAXWIDTH case | Eddie Hung | 2019-08-01 | 1 | -32/+14 | |
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* | | | | | | CO is sign extension only if signed multiplier | Eddie Hung | 2019-08-01 | 1 | -1/+6 | |
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* | | | | | | Fix typo | Eddie Hung | 2019-08-01 | 1 | -1/+1 | |
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* | | | | | | Do not compute sign bit if result is zero | Eddie Hung | 2019-07-31 | 1 | -1/+2 | |
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* | | | | | | For signed multipliers, compute sign bit separately... | Eddie Hung | 2019-07-31 | 1 | -23/+42 | |
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* | | | | | | Restore old CO behaviour | Eddie Hung | 2019-07-31 | 1 | -6/+7 | |
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* | | | | | | Helper: SigSpec::operator[] to accept negative indices | Eddie Hung | 2019-07-31 | 1 | -2/+2 | |
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* | | | | | | Fix spacing | Eddie Hung | 2019-07-26 | 1 | -3/+3 | |
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* | | | | | | Update test_autotb doc to reflect default value of zero | Eddie Hung | 2019-07-26 | 1 | -1/+3 | |
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* | | | | | | Add doc for "test_autotb -seed" option | Eddie Hung | 2019-07-26 | 1 | -0/+3 | |
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* | | | | | | Pop the CO bit from O | Eddie Hung | 2019-07-26 | 1 | -1/+3 | |
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* | | | | | | Allow adders/accumulators with 33 bits using CO output | Eddie Hung | 2019-07-26 | 1 | -3/+8 | |
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* | | | | | | Add copyright header, comment on cascade | Eddie Hung | 2019-07-24 | 1 | -4/+34 | |
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* | | | | | | Eliminate warnings by sizing O correctly | Eddie Hung | 2019-07-23 | 1 | -1/+5 | |
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* | | | | | | Typo for Y_WIDTH | Eddie Hung | 2019-07-23 | 1 | -1/+1 | |
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* | | | | | | Fix muxAB logic | Eddie Hung | 2019-07-23 | 1 | -3/+2 | |
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* | | | | | | Remove debug print | Eddie Hung | 2019-07-23 | 1 | -1/+1 | |
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* | | | | | | Simplify and fix for MACs | Eddie Hung | 2019-07-23 | 2 | -56/+38 | |
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* | | | | | | Fix typo | Eddie Hung | 2019-07-23 | 1 | -13/+21 | |
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* | | | | | | Fix spacing | Eddie Hung | 2019-07-22 | 1 | -2/+2 | |
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* | | | | | | Remove debug | Eddie Hung | 2019-07-22 | 1 | -1/+0 | |
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* | | | | | | Pack hi and lo registers separately | Eddie Hung | 2019-07-22 | 2 | -39/+70 | |
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* | | | | | | SigSpec::extract() to return as many bits as poss if out of bounds | Eddie Hung | 2019-07-22 | 1 | -1/+7 | |
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* | | | | | | Rename according to vendor doc TN1295 | Eddie Hung | 2019-07-22 | 3 | -55/+56 | |
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* | | | | | | Pack Y register | Eddie Hung | 2019-07-22 | 2 | -22/+38 | |
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* | | | | | | opt and wreduce necessary for -dsp | Eddie Hung | 2019-07-22 | 1 | -2/+4 | |
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* | | | | | | Pack adders not just accumulators | Eddie Hung | 2019-07-22 | 2 | -16/+33 | |
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