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Merge pull request #944 from YosysHQ/clifford/pmux2shiftx
Clifford Wolf
2019-04-22
4
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+894
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Auto-initialize OnehotDatabase on-demand in pmux2shiftx.cc
Clifford Wolf
2019-04-20
1
-4
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+7
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Add "onehot" pass, improve "pmux2shiftx" onehot handling
Clifford Wolf
2019-04-20
1
-13
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+404
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Improve "pmux2shiftx"
Clifford Wolf
2019-04-20
2
-11
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+9
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Fix some typos
Clifford Wolf
2019-04-20
1
-2
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+2
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Improvements in "pmux2shiftx"
Clifford Wolf
2019-04-20
2
-13
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+53
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Improvements in pmux2shiftx
Clifford Wolf
2019-04-20
3
-33
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+36
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Add test for pmux2shiftx
Clifford Wolf
2019-04-20
2
-0
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+52
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Improve pmux2shift ctrl permutation finder
Clifford Wolf
2019-04-20
1
-27
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+114
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Complete rewrite of pmux2shiftx
Clifford Wolf
2019-04-20
1
-27
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+265
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Import initial pmux2shiftx from eddieh
Clifford Wolf
2019-04-20
2
-0
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+82
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Merge pull request #945 from YosysHQ/clifford/libwb
Clifford Wolf
2019-04-22
9
-39
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+124
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Disable blackbox detection in techmap files
Clifford Wolf
2019-04-22
1
-1
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+1
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Fix tests
Clifford Wolf
2019-04-21
2
-2
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+3
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Add "noblackbox" attribute
Clifford Wolf
2019-04-21
2
-18
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+33
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New behavior for front-end handling of whiteboxes
Clifford Wolf
2019-04-20
6
-34
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+103
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Merge pull request #943 from YosysHQ/clifford/whitebox
Clifford Wolf
2019-04-20
27
-55
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+157
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Add "techmap -wb", use in formal flows
Clifford Wolf
2019-04-20
3
-6
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+13
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Check blackbox attribute in techmap/simplemap
Clifford Wolf
2019-04-20
2
-2
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+2
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Add "wbflip" command
Clifford Wolf
2019-04-20
3
-3
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+45
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Revert "write_json to not write contents (cells/wires) of whiteboxes"
Eddie Hung
2019-04-18
1
-59
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+56
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write_json to not write contents (cells/wires) of whiteboxes
Eddie Hung
2019-04-18
1
-56
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+59
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Ignore 'whitebox' attr in flatten with "-wb" option
Eddie Hung
2019-04-18
2
-7
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+21
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Add "whitebox" attribute, add "read_verilog -wb"
Clifford Wolf
2019-04-18
23
-42
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+81
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Merge pull request #942 from YosysHQ/clifford/fix931
Clifford Wolf
2019-04-20
2
-5
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+63
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Improve proc full_case detection and handling, fixes #931
Clifford Wolf
2019-04-18
2
-5
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+63
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Improve "show" handling of 0/1/X/Z padding
Clifford Wolf
2019-04-20
1
-2
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+21
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Change "ne" to "neq" in btor2 output
Clifford Wolf
2019-04-19
1
-1
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+1
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Add tests/aiger/.gitignore
Clifford Wolf
2019-04-19
1
-0
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+2
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Spelling fixes
Eddie Hung
2019-04-19
1
-2
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+2
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Update to ABC 3709744
Clifford Wolf
2019-04-18
1
-1
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+1
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Merge pull request #917 from YosysHQ/eddie/fix_retime
Eddie Hung
2019-04-18
4
-38
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+46
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Fix abc's remap_name to not ignore [^0-9] when extracting sid
Eddie Hung
2019-04-18
1
-12
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+16
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ABC to call retime all the time
Eddie Hung
2019-04-18
1
-15
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+11
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Revert "synth_* with -retime option now calls abc with -D 1 as well"
Eddie Hung
2019-04-18
11
-15
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+15
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Merge branch 'master' into eddie/fix_retime
Eddie Hung
2019-04-18
7
-75
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+72
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Update to ABC d1b6413
Clifford Wolf
2019-04-17
1
-1
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+1
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Merge pull request #939 from YosysHQ/revert895
Eddie Hung
2019-04-16
1
-28
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+0
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Revert #895
Eddie Hung
2019-04-16
1
-28
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+0
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Merge pull request #937 from YosysHQ/revert-932-eddie/fixdlatch
Eddie Hung
2019-04-15
2
-4
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+3
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Revert "Recognise default entry in case even if all cases covered (fix for #9...
Eddie Hung
2019-04-15
2
-4
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+3
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Merge pull request #936 from YosysHQ/README-fix-quotes
Eddie Hung
2019-04-15
1
-2
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+2
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README: fix some incorrect quoting.
whitequark
2019-04-15
1
-2
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+2
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Merge pull request #928 from litghost/add_xc7_sim_models
Eddie Hung
2019-04-12
3
-41
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+60
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Remove BUFGCTRL, BUFHCE and LUT6_2 from cells_xtra.
Keith Rothman
2019-04-12
3
-52
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+14
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Fix LUT6_2 definition.
Keith Rothman
2019-04-09
1
-3
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+3
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Add additional cells sim models for core 7-series primatives.
Keith Rothman
2019-04-09
1
-0
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+57
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Merge pull request #933 from dh73/master
Clifford Wolf
2019-04-12
1
-3
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+9
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Fixing issues in CycloneV cell sim
Diego
2019-04-11
1
-3
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+9
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Merge pull request #932 from YosysHQ/eddie/fixdlatch
Clifford Wolf
2019-04-12
2
-3
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+4
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