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| * | | Merge pull request #3335 from programmerjake/divfloor-in-write_smt2 | Jannis Harder | 2022-05-25 | 1 | -0/+21 | |
| |\ \ | | | | | | | add $divfloor support to write_smt2 | |||||
| | * | | add $divfloor support to write_smt2 | Jacob Lifshay | 2022-05-24 | 1 | -0/+21 | |
| | | | | | | | | | | | | | Fixes: #3330 | |||||
| * | | | Merge pull request #3138 from DanielG/fix-git-rev | Miodrag Milanović | 2022-05-25 | 3 | -0/+13 | |
| |\ \ \ | | | | | | | | | Make GIT_REV logic work in release tarballs | |||||
| | * | | | Make GIT_REV logic work in release tarballs | Daniel Gröber | 2022-05-25 | 3 | -0/+13 | |
| |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently GIT_REV doesn't get set properly when building a release tarball. To fix this we arrange for .gitcommit to contain the (short) commit hash in tarballs generated with git-archive(1) using export-subst in gitattributes. This way the correct commit hash is (reproducibly) included in the release tarballs while not burdening the maintainers with updating it in the git repo. Please note this even works on Github and similar forges as they use git-archive for generating tarballs so this works out quite nicely. | |||||
| * / / | verilog: fix signedness when removing unreachable cases | Jannis Harder | 2022-05-24 | 3 | -0/+39 | |
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| * | | Bump version | github-actions[bot] | 2022-05-24 | 1 | -1/+1 | |
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| * | | Merge pull request #3332 from YosysHQ/verific_f | Miodrag Milanović | 2022-05-23 | 1 | -20/+25 | |
| |\ \ | | | | | | | Update Verific command file documentation | |||||
| | * | | fix text to fit 80 columns | Miodrag Milanovic | 2022-05-23 | 1 | -6/+9 | |
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| | * | | Update verific command file documentation | Miodrag Milanovic | 2022-05-23 | 1 | -17/+19 | |
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| * | | Use analysis mode if set in file | Miodrag Milanovic | 2022-05-23 | 1 | -2/+2 | |
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| * | | Merge pull request #3331 from YosysHQ/git_rev_fix | Miodrag Milanović | 2022-05-23 | 1 | -1/+1 | |
| |\ \ | | | | | | | work around the new(ish) git safe.directory restrictions | |||||
| | * | | Change way to get commit sha | Jannis Harder | 2022-05-23 | 1 | -1/+1 | |
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| * | | abc9_ops: Don't leave unused derived modules lying around | gatecat | 2022-05-23 | 1 | -0/+9 | |
| | | | | | | | | | | | | | | | These later become accidentally used for techmap replacements for blackboxes that we don't actually want. Signed-off-by: gatecat <gatecat@ds0.me> | |||||
| * | | Bump version | github-actions[bot] | 2022-05-21 | 1 | -1/+1 | |
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| * | | Merge pull request #3324 from jix/confusing-select-errors | Jannis Harder | 2022-05-20 | 1 | -8/+10 | |
| |\ \ | | | | | | | select: Fix -assert-none and -assert-any error output and docs | |||||
| | * | | select: Fix -assert-none and -assert-any error output and docs | Jannis Harder | 2022-05-19 | 1 | -8/+10 | |
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Both of these options consider a selection containing only empty modules as non-empty. This wasn't mentioned in the documentation nor did the error message when using `select -assert-none` list those empty modules, which produced a very confusing error message complaining about a non-empty selection followed by an empty listing of the selection. This fixes the documentation and changes the `-assert-none` and `-assert-any` assertion error messages to also output fully selected modules (this includes selected empty modules). It doesn't change the messages for `-assert-count` etc. as they don't count modules. | |||||
| * | | Bump version | github-actions[bot] | 2022-05-19 | 1 | -1/+1 | |
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| * | | Add memory_bmux2rom pass. | Marcelina Kościelnicka | 2022-05-18 | 4 | -1/+124 | |
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| * | | Add memory_libmap tests. | Marcelina Kościelnicka | 2022-05-18 | 22 | -0/+1500 | |
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| * | | gatemate: Use `memory_libmap` pass. | Marcelina Kościelnicka | 2022-05-18 | 3 | -781/+927 | |
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| * | | machxo2: Use `memory_libmap` pass. | Marcelina Kościelnicka | 2022-05-18 | 7 | -1/+578 | |
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| * | | efinix: Use `memory_libmap` pass. | Marcelina Kościelnicka | 2022-05-18 | 4 | -102/+164 | |
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| * | | anlogic: Use `memory_libmap` pass. | Marcelina Kościelnicka | 2022-05-18 | 9 | -303/+585 | |
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| * | | ice40: Use `memory_libmap` pass. | Marcelina Kościelnicka | 2022-05-18 | 9 | -514/+293 | |
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| * | | xilinx: Use `memory_libmap` pass. | Marcelina Kościelnicka | 2022-05-18 | 40 | -2315/+4540 | |
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| * | | gowin: Use `memory_libmap` pass. | Marcelina Kościelnicka | 2022-05-18 | 9 | -266/+576 | |
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| * | | nexus: Use `memory_libmap` pass. | Marcelina Kościelnicka | 2022-05-18 | 11 | -519/+679 | |
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| * | | ecp5: Use `memory_libmap` pass. | Marcelina Kościelnicka | 2022-05-18 | 10 | -601/+602 | |
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| * | | Add memory_libmap pass. | Marcelina Kościelnicka | 2022-05-18 | 6 | -0/+3884 | |
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| * | | proc_rom: Add special handling of const-0 address bits. | Marcelina Kościelnicka | 2022-05-18 | 2 | -15/+186 | |
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| * | | Bump version | github-actions[bot] | 2022-05-18 | 1 | -1/+1 | |
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| * | | Merge pull request #3310 from robinsonb5-PRs/master | Miodrag Milanović | 2022-05-17 | 1 | -0/+2 | |
| |\ \ | | | | | | | Now calls Tcl_Init after creating the interp, fixes clock format. | |||||
| | * | | Use log_warning when Tcl_Init fails, report error with Tcl_ErrnoMsg. | Alastair M. Robinson | 2022-05-16 | 1 | -1/+1 | |
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| | * | | Now calls Tcl_Init after creating the interp, fixes clock format. | Alastair M. Robinson | 2022-05-10 | 1 | -0/+2 | |
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| * | | | opt_ffinv: Use ModIndex instead of ModWalker. | Marcelina Kościelnicka | 2022-05-17 | 1 | -50/+53 | |
| | | | | | | | | | | | | | This avoids using out-of-data index information. | |||||
| * | | | Merge pull request #3314 from jix/sva_value_change_logic_wide | Jannis Harder | 2022-05-16 | 3 | -9/+72 | |
| |\ \ \ | | | | | | | | | verific: Use new value change logic also for $stable of wide signals. | |||||
| | * | | | verific: Use new value change logic also for $stable of wide signals. | Jannis Harder | 2022-05-11 | 3 | -9/+72 | |
| | |/ / | | | | | | | | | | I missed this in the previous PR. | |||||
| * | | | Bump version | github-actions[bot] | 2022-05-14 | 1 | -1/+1 | |
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| * | | | Add opt_ffinv pass. | Marcelina Kościelnicka | 2022-05-13 | 4 | -3/+268 | |
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| * | | | Bump version | github-actions[bot] | 2022-05-13 | 1 | -1/+1 | |
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| * | | | Add proc_rom pass. | Marcelina Kościelnicka | 2022-05-13 | 5 | -1/+283 | |
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| * | | Bump version | github-actions[bot] | 2022-05-10 | 1 | -1/+1 | |
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| * | | Merge pull request #3305 from jix/sva_value_change_logic | Jannis Harder | 2022-05-09 | 8 | -11/+121 | |
| |\ \ | | | | | | | verific: Improve logic generated for SVA value change expressions | |||||
| | * | | verific: Improve logic generated for SVA value change expressions | Jannis Harder | 2022-05-09 | 8 | -11/+121 | |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The previously generated logic assumed an unconstrained past value in the initial state and did not handle 'x values. While the current formal verification flow uses 2-valued logic, SVA value change expressions require a past value of 'x during the initial state to behave in the expected way (i.e. to consider both an initial 0 and an initial 1 as $changed and an initial 1 as $rose and an initial 0 as $fell). This patch now generates logic that at the same time a) provides the expected behavior in a 2-valued logic setting, not depending on any dont-care optimizations, and b) properly handles 'x values in yosys simulation | |||||
| * | | | Merge pull request #3297 from jix/sva_nested_clk_else | Jannis Harder | 2022-05-09 | 4 | -5/+27 | |
| |\ \ \ | | | | | | | | | verific: Fix conditions of SVAs with explicit clocks within procedures | |||||
| | * | | | verific: Fix conditions of SVAs with explicit clocks within procedures | Jannis Harder | 2022-05-03 | 4 | -5/+27 | |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For SVAs that have an explicit clock and are contained in a procedure which conditionally executes the assertion, verific expresses this using a mux with one input connected to constant 1 and the other output connected to an SVA_AT. The existing code only handled the case where the first input is connected to 1. This patch also handles the other case. | |||||
| * | | | | Next dev cycle | Miodrag Milanovic | 2022-05-09 | 2 | -2/+5 | |
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| * | | | | Release version 0.17 | Miodrag Milanovic | 2022-05-09 | 2 | -3/+3 | |
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| * | | | | Update CHANGELOG | Miodrag Milanovic | 2022-05-09 | 1 | -0/+3 | |
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| * | | | | Update manual | Miodrag Milanovic | 2022-05-09 | 1 | -0/+44 | |
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