| Commit message (Expand) | Author | Age | Files | Lines |
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| | | * | | | | | | | Fix linking issue for new mxe and pthread | Miodrag Milanovic | 2019-08-02 | 1 | -1/+2 |
| | | * | | | | | | | Fix yosys linking for mxe | Miodrag Milanovic | 2019-08-02 | 1 | -1/+1 |
| | | * | | | | | | | New mxe hacks needed to support 2ca237e | Miodrag Milanovic | 2019-08-02 | 1 | -0/+4 |
| | | * | | | | | | | Fix formatting for msys2 mingw build using GetSize | Miodrag Milanovic | 2019-08-02 | 8 | -17/+20 |
| | | * | | | | | | | Update CHANGELOG | David Shah | 2019-07-26 | 1 | -10/+101 |
| | | * | | | | | | | Merge pull request #1175 from whitequark/write_verilog-fix-case-attr-position | Clifford Wolf | 2019-07-09 | 1 | -3/+2 |
| | | * | | | | | | | Update CHANGELOG | David Shah | 2019-07-09 | 1 | -0/+1 |
| | | * | | | | | | | Merge pull request #1163 from whitequark/more-case-attrs | Clifford Wolf | 2019-07-09 | 3 | -16/+28 |
| | | * | | | | | | | Merge pull request #1162 from whitequark/rtlil-case-attrs | Clifford Wolf | 2019-07-09 | 3 | -5/+15 |
| | | * | | | | | | | Merge pull request #1159 from btut/fix/1090_segfault_cell_and_wire | Clifford Wolf | 2019-07-09 | 1 | -0/+3 |
| | | * | | | | | | | Merge pull request #1147 from YosysHQ/clifford/fix1144 | Clifford Wolf | 2019-07-09 | 3 | -82/+26 |
| | | * | | | | | | | Merge pull request #1154 from whitequark/manual-sync-always | Clifford Wolf | 2019-07-09 | 1 | -2/+3 |
| | | * | | | | | | | Merge pull request #1153 from YosysHQ/dave/fix_multi_mux | David Shah | 2019-07-09 | 3 | -3/+25 |
| | | * | | | | | | | Fix read_verilog assert/assume/etc on default case label, fixes YosysHQ/Symbi... | Clifford Wolf | 2019-07-09 | 1 | -0/+2 |
| | | * | | | | | | | autotest.sh to define _AUTOTB when test_autotb | Eddie Hung | 2019-07-09 | 1 | -1/+1 |
| | | * | | | | | | | Merge pull request #1146 from gsomlo/gls-test-abc-ext | Clifford Wolf | 2019-07-09 | 4 | -8/+29 |
| | | * | | | | | | | Checkout yosys-0.9-rc branch of yosys-tests | Eddie Hung | 2019-07-02 | 1 | -1/+1 |
| | | * | | | | | | | Add missing CHANGELOG entries | Eddie Hung | 2019-06-28 | 1 | -0/+3 |
| | * | | | | | | | | Merge pull request #1112 from acw1251/pyosys_sigsig_issue | Clifford Wolf | 2019-08-25 | 1 | -16/+10 |
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| | | * | | | | | | | | Fixed pyosys commands returning RTLIL::SigSig | acw1251 | 2019-06-19 | 1 | -16/+10 |
| | * | | | | | | | | | Merge pull request #1327 from YosysHQ/clifford/pmgen | Clifford Wolf | 2019-08-24 | 5 | -32/+280 |
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| | | * | | | | | | | | | indo -> into | Eddie Hung | 2019-08-23 | 1 | -1/+1 |
| | | * | | | | | | | | | Fix port hanlding in pmgen | Clifford Wolf | 2019-08-23 | 1 | -4/+3 |
| | | * | | | | | | | | | Add pmgen slices and choices | Clifford Wolf | 2019-08-23 | 5 | -28/+277 |
| | * | | | | | | | | | | Add undocumented feature | Eddie Hung | 2019-08-23 | 1 | -0/+8 |
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| * | | | | | | | | | | Merge branch 'xaig_arrival' of github.com:YosysHQ/yosys into xaig_arrival | Eddie Hung | 2019-08-23 | 2 | -14/+1 |
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| | * | | | | | | | | | | Revert to upstream | Eddie Hung | 2019-08-23 | 1 | -2/+2 |
| | * | | | | | | | | | | Fix spacing | Eddie Hung | 2019-08-23 | 1 | -1/+1 |
| | * | | | | | | | | | | Remove unused model | Eddie Hung | 2019-08-23 | 1 | -13/+0 |
| * | | | | | | | | | | | Cleanup | Eddie Hung | 2019-08-23 | 1 | -130/+59 |
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| * | | | | | | | | | | Put attributes above port | Eddie Hung | 2019-08-23 | 2 | -27/+62 |
| * | | | | | | | | | | Merge remote-tracking branch 'origin/master' into xaig_arrival | Eddie Hung | 2019-08-23 | 28 | -114/+1110 |
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| | * | | | | | | | | | Forgot one | Eddie Hung | 2019-08-23 | 1 | -1/+2 |
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| | * | | | | | | | | Put abc_* attributes above port | Eddie Hung | 2019-08-23 | 3 | -14/+28 |
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| | * | | | | | | | Merge pull request #1326 from mmicko/doc-update | Eddie Hung | 2019-08-23 | 1 | -2/+5 |
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| | | * | | | | | | Make macOS depenency clear | Miodrag Milanovic | 2019-08-23 | 1 | -2/+5 |
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| | * | | | | / | Do not propagate mem2reg attribute through to result | Eddie Hung | 2019-08-22 | 2 | -1/+3 |
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| | * | | | | | Spelling | Eddie Hung | 2019-08-22 | 1 | -2/+2 |
| | * | | | | | Merge pull request #1322 from mmicko/pyosys_osx | Eddie Hung | 2019-08-22 | 1 | -0/+2 |
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| | | * | | | | | do not require boost if pyosys is not used | Miodrag Milanovic | 2019-08-22 | 1 | -0/+2 |
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| | * | | | | | Merge pull request #1319 from TeaEngineering/shuckc/brew-tcl-tk | Eddie Hung | 2019-08-22 | 1 | -0/+1 |
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| | | * | | | | | require tcl-tk in Brewfile | Chris Shucksmith | 2019-08-22 | 1 | -0/+1 |
| | * | | | | | | Merge pull request #1317 from YosysHQ/eddie/opt_expr_shiftx | Eddie Hung | 2019-08-22 | 2 | -4/+96 |
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| | | * | | | | | | Copy-paste typo | Eddie Hung | 2019-08-22 | 1 | -1/+1 |
| | | * | | | | | | Respect opt_expr -keepdc as per @cliffordwolf | Eddie Hung | 2019-08-22 | 2 | -1/+15 |
| | | * | | | | | | Handle $shift and Y_WIDTH > 1 as per @cliffordwolf | Eddie Hung | 2019-08-22 | 2 | -5/+51 |
| | | * | | | | | | Add cover() | Eddie Hung | 2019-08-22 | 1 | -0/+1 |
| | | * | | | | | | Canonical form | Eddie Hung | 2019-08-22 | 1 | -5/+5 |
| | | * | | | | | | Add test | Eddie Hung | 2019-08-21 | 1 | -0/+14 |
| | | * | | | | | | opt_expr to trim A port of $shiftx if Y_WIDTH == 1 | Eddie Hung | 2019-08-21 | 1 | -0/+17 |
