| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Another block of spelling fixes | Larry Doolittle | 2015-08-14 | 24 | -53/+53 |
| | | | | | Smaller this time | ||||
| * | Keep gcc from complaining about uninitialized variables | Larry Doolittle | 2015-08-14 | 2 | -3/+3 |
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| * | Re-created command-reference-manual.tex, copied some doc fixes to online help | Clifford Wolf | 2015-08-14 | 10 | -52/+668 |
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| * | Spell check (by Larry Doolittle) | Clifford Wolf | 2015-08-14 | 63 | -220/+220 |
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| * | Merge branch 'master' of github.com:cliffordwolf/yosys | Clifford Wolf | 2015-08-13 | 17 | -79/+169 |
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| | * | Added "write_smt2 -regs" | Clifford Wolf | 2015-08-12 | 1 | -7/+36 |
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| | * | Fixed "make clean" for out-of-tree builds | Clifford Wolf | 2015-08-12 | 1 | -1/+1 |
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| | * | Adjust makefiles to work with out-of-tree builds | Clifford Wolf | 2015-08-12 | 12 | -41/+32 |
| | | | | | | | | | This is based on work done by Larry Doolittle | ||||
| | * | Improved handling of "keep" attributes in hierarchical designs in opt_clean | Clifford Wolf | 2015-08-12 | 2 | -27/+58 |
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| | * | Fixed hashlib for 64 bit int keys | Clifford Wolf | 2015-08-12 | 1 | -3/+9 |
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| | * | Added SMV back-end 'test_cells.sh' script | Clifford Wolf | 2015-08-12 | 1 | -0/+33 |
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| * | | More ASCII encoding fixes | Clifford Wolf | 2015-08-13 | 2 | -2/+2 |
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| * | | Fixed CRLF line endings | Clifford Wolf | 2015-08-13 | 6 | -563/+563 |
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| * | | Some ASCII encoding fixes (comments and docs) by Larry Doolittle | Clifford Wolf | 2015-08-13 | 4 | -6/+6 |
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| * | Merge pull request #70 from gaomy3832/bugfix | Clifford Wolf | 2015-08-12 | 1 | -0/+10 |
| |\ | | | | | Remove unused blackbox modules in opt_clean. | ||||
| | * | Remove unused blackbox modules in opt_clean. | Mingyu Gao | 2015-08-11 | 1 | -0/+10 |
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| | * | Bugfix for cell hash cache option in opt_share. | Mingyu Gao | 2015-08-10 | 1 | -0/+2 |
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| * | | Bugfix for cell hash cache option in opt_share. | Mingyu Gao | 2015-08-11 | 1 | -0/+2 |
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| * | | Fixed handling of [a-fxz?] in decimal constants | Clifford Wolf | 2015-08-11 | 2 | -2/+11 |
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| * | | Added missing ct_all setup to opt_clean | Clifford Wolf | 2015-08-11 | 1 | -0/+3 |
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| * | Use MEMID as name for $mem cell | Clifford Wolf | 2015-08-09 | 2 | -43/+53 |
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| * | Merge pull request #69 from zeldin/master | Clifford Wolf | 2015-08-07 | 1 | -0/+10 |
| |\ | | | | | Added iCE40 WARMBOOT cell | ||||
| | * | Added iCE40 WARMBOOT cell | Marcus Comstedt | 2015-08-06 | 1 | -0/+10 |
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| * | Remove some very strange whitespace in btor.cc (by Larry Doolittle) | Clifford Wolf | 2015-08-05 | 1 | -7/+7 |
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| * | Bugfix in SMV back-end for partially unassigned wires | Clifford Wolf | 2015-08-05 | 1 | -4/+16 |
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| * | Added ENABLE_LIBYOSYS Makefile option | Clifford Wolf | 2015-08-04 | 2 | -14/+10 |
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| * | Added $assert support to SMV back-end | Clifford Wolf | 2015-08-04 | 1 | -4/+21 |
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| * | Added libyosys.so build | Clifford Wolf | 2015-08-04 | 3 | -3/+24 |
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| * | Merge pull request #68 from zeldin/master | Clifford Wolf | 2015-08-01 | 1 | -1/+8 |
| |\ | | | | | Add -noautowire option to verilog frontend | ||||
| | * | Add -noautowire option to verilog frontend | Marcus Comstedt | 2015-08-01 | 1 | -1/+8 |
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| * | Added WORDS parameter to $meminit | Clifford Wolf | 2015-07-31 | 6 | -16/+95 |
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| * | Fixed flatten $meminit handling | Clifford Wolf | 2015-07-30 | 1 | -1/+1 |
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| * | Improvements in BLIF back-end | Clifford Wolf | 2015-07-29 | 1 | -5/+84 |
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| * | Fixed nested mem2reg | Clifford Wolf | 2015-07-29 | 2 | -4/+11 |
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| * | Don't write a 17th memory bit in ice40/cells_sim (by Larry Doolittle) | Clifford Wolf | 2015-07-27 | 1 | -1/+0 |
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| * | Fixed "check" command for inout ports | Clifford Wolf | 2015-07-27 | 1 | -3/+11 |
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| * | Some cleanups in opt_rmdff | Clifford Wolf | 2015-07-25 | 1 | -16/+9 |
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| * | Added "miter -assert" | Clifford Wolf | 2015-07-25 | 1 | -1/+93 |
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| * | Keep modules with $assume (like $assert) | Clifford Wolf | 2015-07-25 | 1 | -1/+1 |
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| * | Improved $adff simplification | Clifford Wolf | 2015-07-24 | 1 | -1/+1 |
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| * | iCE40 DFF sim models: init Q regs to 0 | Clifford Wolf | 2015-07-20 | 1 | -20/+43 |
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| * | Fixed techmap processes error msg | Clifford Wolf | 2015-07-18 | 1 | -2/+3 |
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| * | Avoid tristate warning for blackbox ice40/cells_sim.v | Clifford Wolf | 2015-07-18 | 1 | -0/+2 |
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| * | Some fixes in "select" command | Clifford Wolf | 2015-07-16 | 1 | -1/+3 |
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| * | Fixed YosysJS.create_worker() usage of this.url_prefix | Clifford Wolf | 2015-07-10 | 1 | -1/+1 |
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| * | Improved liberty file test case | Clifford Wolf | 2015-07-06 | 1 | -1/+2 |
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| * | Updated ABC | Clifford Wolf | 2015-07-06 | 1 | -1/+1 |
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| * | Do not collect disabled $memwr cells | Clifford Wolf | 2015-07-06 | 1 | -15/+18 |
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| * | Improved YosysJS WebWorker API | Clifford Wolf | 2015-07-04 | 3 | -10/+51 |
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| * | Bugfix in fsm_extract | Clifford Wolf | 2015-07-03 | 1 | -3/+16 |
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index : iCE40/yosys | |
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