diff options
| author | Clifford Wolf <clifford@clifford.at> | 2015-07-18 11:59:04 +0200 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2015-07-18 11:59:04 +0200 |
| commit | 54588a276a0c18c06ed6a4eb98a29b373d4719b5 (patch) | |
| tree | 25ff1c873efe0f51944e8a903aed036a74d9d8a8 | |
| parent | 8393f705381b00f1e4a3c74df87eb638c15745d9 (diff) | |
| download | yosys-54588a276a0c18c06ed6a4eb98a29b373d4719b5.tar.gz yosys-54588a276a0c18c06ed6a4eb98a29b373d4719b5.tar.bz2 yosys-54588a276a0c18c06ed6a4eb98a29b373d4719b5.zip | |
Avoid tristate warning for blackbox ice40/cells_sim.v
| -rw-r--r-- | techlibs/ice40/cells_sim.v | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/techlibs/ice40/cells_sim.v b/techlibs/ice40/cells_sim.v index afa8a516b..c06f5e143 100644 --- a/techlibs/ice40/cells_sim.v +++ b/techlibs/ice40/cells_sim.v @@ -18,6 +18,7 @@ module SB_IO ( parameter [0:0] NEG_TRIGGER = 1'b0; parameter IO_STANDARD = "SB_LVCMOS"; +`ifndef BLACKBOX reg dout, din_0, din_1; reg din_q_0, din_q_1; reg dout_q_0, dout_q_1; @@ -57,6 +58,7 @@ module SB_IO ( if (PIN_TYPE[5:4] == 2'b10) assign PACKAGE_PIN = outena_q ? dout : 1'bz; if (PIN_TYPE[5:4] == 2'b11) assign PACKAGE_PIN = OUTPUT_ENABLE ? dout : 1'bz; endgenerate +`endif endmodule module SB_GB_IO ( |