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Merge remote-tracking branch 'origin/master' into xaig_dff
Eddie Hung
2019-07-01
92
-848
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+3030
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Move abc9 from yosys-0.8 to yosys-0.9 in CHANGELOG
Eddie Hung
2019-07-01
1
-5
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+11
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Merge branch 'master' of github.com:YosysHQ/yosys
Eddie Hung
2019-07-01
3
-0
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+4
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install *_nowide.lut files
Eddie Hung
2019-06-29
2
-0
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+3
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Merge pull request #1149 from gsomlo/gls-1098-abcext-fixup
Eddie Hung
2019-06-28
1
-0
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+1
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Make abc9 pass aware of optional ABCEXTERNAL override
Gabriel L. Somlo
2019-06-28
1
-0
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+1
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autotest.sh to define _AUTOTB when test_autotb
Eddie Hung
2019-06-28
1
-1
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+1
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Replace log_assert() with meaningful log_error()
Eddie Hung
2019-06-28
1
-1
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+5
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Remove peepopt call in synth_xilinx since already in synth -run coarse
Eddie Hung
2019-06-28
1
-5
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+0
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Add missing CHANGELOG entries
Eddie Hung
2019-06-28
1
-0
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+3
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Fix spacing
Eddie Hung
2019-06-28
1
-2
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+2
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Merge pull request #1098 from YosysHQ/xaig
Eddie Hung
2019-06-28
45
-247
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+3642
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Add generic __builtin_bswap32 function
Eddie Hung
2019-06-28
1
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+15
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Also fix write_aiger for UB
Eddie Hung
2019-06-28
1
-26
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+26
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Fix more potential for undefined behaviour due to container invalidation
Eddie Hung
2019-06-28
1
-6
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+10
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Update synth_ice40 -device doc to be relevant for -abc9 only
Eddie Hung
2019-06-28
1
-2
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+2
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Disable boxing of ECP5 dist RAM due to regression
Eddie Hung
2019-06-28
1
-1
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+1
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Add write address to abc_scc_break of ECP5 dist RAM
Eddie Hung
2019-06-28
1
-1
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+1
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Fix DO4 typo
Eddie Hung
2019-06-28
1
-1
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+1
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Reduce diff with upstream
Eddie Hung
2019-06-27
1
-4
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+2
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Extraneous newline
Eddie Hung
2019-06-27
1
-1
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+0
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Remove noise from ice40/cells_sim.v
Eddie Hung
2019-06-27
1
-5
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+0
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Refactor for one "abc_carry" attribute on module
Eddie Hung
2019-06-27
5
-82
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+84
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Merge branch 'xaig' of github.com:YosysHQ/yosys into xaig
Eddie Hung
2019-06-27
2
-0
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+19
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Merge remote-tracking branch 'origin/master' into xaig
Eddie Hung
2019-06-27
2
-0
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+19
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Do not use Module::remove() iterator version
Eddie Hung
2019-06-27
1
-5
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+6
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Remove redundant doc
Eddie Hung
2019-06-27
1
-3
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+0
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Remove &retime when abc9 -fast
Eddie Hung
2019-06-27
1
-1
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+1
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Cleanup abc9.cc
Eddie Hung
2019-06-27
1
-15
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+17
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Undo iterator based Module::remove() for cells, as containers will not
Eddie Hung
2019-06-27
2
-11
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+2
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Merge remote-tracking branch 'origin/master' into xaig
Eddie Hung
2019-06-27
4
-9
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+39
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Merge remote-tracking branch 'origin/master' into xaig
Eddie Hung
2019-06-27
0
-0
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+0
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Add warning if synth_xilinx -abc9 with family != xc7
Eddie Hung
2019-06-27
1
-0
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+2
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Remove unneeded include
Eddie Hung
2019-06-27
1
-3
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+0
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Merge origin/master
Eddie Hung
2019-06-27
10
-65
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+480
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Fix spacing
Eddie Hung
2019-06-26
1
-38
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+38
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Improve debugging message for comb loops
Eddie Hung
2019-06-26
1
-4
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+6
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Add WE to ECP5 dist RAM's abc_scc_break too
Eddie Hung
2019-06-26
1
-1
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+1
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Update comment on boxes
Eddie Hung
2019-06-26
2
-4
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+6
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Add "WE" to dist RAM's abc_scc_break
Eddie Hung
2019-06-26
1
-3
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+3
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Support more than one port in the abc_scc_break attr
Eddie Hung
2019-06-26
1
-38
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+42
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Add write_xaiger into CHANGELOG
Eddie Hung
2019-06-26
1
-0
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+1
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Merge branch 'koriakin/xc7nocarrymux' into xaig
Eddie Hung
2019-06-26
0
-0
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+0
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Remove unused var
Eddie Hung
2019-06-26
1
-1
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+1
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Add _nowide variants of LUT libraries in -nowidelut flows
Eddie Hung
2019-06-26
4
-13
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+44
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Merge branch 'xaig' of github.com:YosysHQ/yosys into xaig
Eddie Hung
2019-06-26
1
-2
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+10
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Merge pull request #1136 from YosysHQ/xaig_ice40_wire_del
Eddie Hung
2019-06-26
1
-2
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+10
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abc9: Add wire delays to synth_ice40
David Shah
2019-06-26
1
-2
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+10
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Merge branch 'koriakin/xc7nocarrymux' into xaig
Eddie Hung
2019-06-26
0
-0
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+0
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Merge branch 'koriakin/xc7nocarrymux' into xaig
Eddie Hung
2019-06-26
0
-0
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+0
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