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* Added test_cell -vlogClifford Wolf2014-09-021-2/+79
* Create a default selection stack in RTLIL::Design::Design()Clifford Wolf2014-09-022-2/+1
* Small bug fixes in $not, $neg, and $shiftx modelsClifford Wolf2014-09-023-9/+8
* Added SAT testing to test_cell eval stageClifford Wolf2014-09-021-1/+89
* Removed references to yosys-svgviewer from docsClifford Wolf2014-09-024-24/+12
* Removed yosys-svgviewerClifford Wolf2014-09-0214-1121/+18
* Using "xdot" instead of "yosys-svgviewer" in show commandClifford Wolf2014-09-022-5/+4
* Added $alu support to test_cellClifford Wolf2014-09-011-1/+22
* Added ConstEval model for $alu cellsClifford Wolf2014-09-011-0/+56
* Added SAT model for $alu cellsClifford Wolf2014-09-011-2/+69
* Fixed "test_cell -simlib all"Clifford Wolf2014-09-011-2/+3
* Added "test_cell -simlib -v"Clifford Wolf2014-09-011-8/+29
* Added "techmap -autoproc"Clifford Wolf2014-09-011-2/+18
* Fixes in old SAT example.ysClifford Wolf2014-09-011-3/+4
* Moved "share" and "wreduce" to passes/opt/Clifford Wolf2014-09-015-2/+2
* Using std::vector<RTLIL::State> instead of RTLIL::Const for RTLIL::SigChunk::...Clifford Wolf2014-09-014-38/+35
* Added eval testing to test_cellClifford Wolf2014-08-311-0/+88
* Fixed return size of const_*() eval functionsClifford Wolf2014-08-311-1/+5
* Added RTLIL::Const::size()Clifford Wolf2014-08-311-0/+2
* Added eval model for $lut cellsClifford Wolf2014-08-311-0/+26
* Typo fixes in cell->*Param() APIClifford Wolf2014-08-311-4/+4
* Added $lut support in test_cell, techmap, satgenClifford Wolf2014-08-314-9/+102
* Added design->scratchpadClifford Wolf2014-08-3010-64/+91
* Added $alu cell typeClifford Wolf2014-08-305-3/+67
* Added autotest -e (do not use -noexpr on write_verilog)Clifford Wolf2014-08-303-4/+6
* Improved write address decoder generation memory_mapClifford Wolf2014-08-301-16/+28
* Fixed module->addPmux()Clifford Wolf2014-08-301-1/+0
* Using worker class in memory_mapClifford Wolf2014-08-301-226/+231
* Replaced $__alu CO/CS outputs with full-width CO outputClifford Wolf2014-08-301-32/+28
* Don't change existing binary FSM encoding if it is already optimalClifford Wolf2014-08-301-1/+6
* Using $pmux info in fsm_extract to optimize transition ctrl_in patternsClifford Wolf2014-08-301-0/+10
* Improved handling of $pmux cells in fsm_extractClifford Wolf2014-08-301-20/+75
* Fixed inserting of Q-inverters in dfflibmapClifford Wolf2014-08-271-0/+5
* Fixed printing of multi-line Makefile.confClifford Wolf2014-08-271-1/+6
* Implemented "rename -enumerate -pattern"Clifford Wolf2014-08-261-4/+13
* Print Makefile.conf as make info messageClifford Wolf2014-08-261-1/+4
* Checking for valid CONFIG value in MakefileClifford Wolf2014-08-251-6/+6
* Optimize shift ops with constant rhs in opt_constClifford Wolf2014-08-241-0/+35
* Added some additional log messages to opt_constClifford Wolf2014-08-241-1/+10
* Added is_signed argument to SigSpec.as_int() and Const.as_int()Clifford Wolf2014-08-242-6/+9
* azonenberg: Make dump_vcd save model when temporal induction fails due to ste...Clifford Wolf2014-08-241-0/+2
* Only call proc_share_dirname() in techmap when necessaryClifford Wolf2014-08-231-2/+1
* Removed compatbility.{h,cc}: Not using open_memstream/fmemopen anymoreClifford Wolf2014-08-238-195/+21
* Changed frontend-api from FILE to std::istreamClifford Wolf2014-08-2322-89/+116
* Changed backend-api from FILE to std::ostreamClifford Wolf2014-08-2316-728/+713
* Added "stat -width"Clifford Wolf2014-08-221-4/+37
* Added emscripten (emcc) support to build system and some build fixesClifford Wolf2014-08-2211-14/+101
* Added DPI-C documentation to README fileClifford Wolf2014-08-221-0/+12
* Added support for non-standard <plugin>:<c_name> DPI syntaxClifford Wolf2014-08-221-0/+12
* Archibald Rust and Clifford Wolf: ffi-based dpi_call()Clifford Wolf2014-08-223-9/+93