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authorClifford Wolf <clifford@clifford.at>2014-08-30 14:34:49 +0200
committerClifford Wolf <clifford@clifford.at>2014-08-30 14:34:49 +0200
commitf910481f35109d7333088ac79bb25729e516fa00 (patch)
tree72c6bac8ce83f73ae6cec6885e99dcbe6f3868c9
parentab019b0bd505ccd63ba1d45013fa163134f6e13b (diff)
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Using $pmux info in fsm_extract to optimize transition ctrl_in patterns
-rw-r--r--passes/fsm/fsm_extract.cc10
1 files changed, 10 insertions, 0 deletions
diff --git a/passes/fsm/fsm_extract.cc b/passes/fsm/fsm_extract.cc
index d1d73db6d..451f00fcb 100644
--- a/passes/fsm/fsm_extract.cc
+++ b/passes/fsm/fsm_extract.cc
@@ -144,6 +144,16 @@ undef_bit_in_next_state:
tr.ctrl_in = sig2const(ce, ctrl_in, RTLIL::State::Sa, dont_care);
tr.ctrl_out = sig2const(ce, ctrl_out, RTLIL::State::Sx);
+ std::map<RTLIL::SigBit, int> ctrl_in_bit_indices;
+ for (int i = 0; i < SIZE(ctrl_in); i++)
+ ctrl_in_bit_indices[ctrl_in[i]] = i;
+
+ for (auto &it : ctrl_in_bit_indices)
+ if (tr.ctrl_in.bits.at(it.second) == RTLIL::S1 && exclusive_ctrls.count(it.first) != 0)
+ for (auto &dc_bit : exclusive_ctrls.at(it.first))
+ if (ctrl_in_bit_indices.count(dc_bit))
+ tr.ctrl_in.bits.at(ctrl_in_bit_indices.at(dc_bit)) = RTLIL::State::Sa;
+
RTLIL::Const log_state_in = RTLIL::Const(RTLIL::State::Sx, fsm_data.state_bits);
if (state_in >= 0)
log_state_in = fsm_data.state_table.at(state_in);