| Commit message (Collapse) | Author | Age | Files | Lines | ||
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| * | | | | | | | | Merge pull request #646 from tomverbeure/issue594 | Clifford Wolf | 2018-10-02 | 1 | -1/+2 | |
| |\ \ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | Fix for issue 594. | |||||
| | * | | | | | | | | Fix for issue 594. | Tom Verbeure | 2018-10-02 | 1 | -1/+2 | |
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| * | | | | | | / | Add read_verilog $changed support | Dan Gisselquist | 2018-10-01 | 1 | -1/+4 | |
| | |_|_|_|_|_|/ |/| | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| * | | | | | | | Merge branch 'yosys-0.8-rc' of github.com:YosysHQ/yosys | Clifford Wolf | 2018-09-30 | 1 | -1/+1 | |
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| | * | | | | | | Fix handling of $past 2nd argument in read_verilog | Clifford Wolf | 2018-09-30 | 1 | -1/+1 | |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| * | | | | | | | Merge branch 'yosys-0.8-rc' of github.com:YosysHQ/yosys | Clifford Wolf | 2018-09-28 | 1 | -4/+4 | |
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| | * | | | | | Update to v2 YosysVS template | Clifford Wolf | 2018-09-28 | 1 | -4/+4 | |
| | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| * | | | | | | Add "read_verilog -noassert -noassume -assert-assumes" | Clifford Wolf | 2018-09-24 | 3 | -6/+49 | |
| | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| * | | | | | | Added support for ommited "parameter" in Verilog-2001 style parameter decl ↵ | Clifford Wolf | 2018-09-23 | 1 | -3/+9 | |
| |/ / / / / | | | | | | | | | | | | | | | | | | | | | | | | | | in SV mode Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| * | | | | | Merge branch 'master' of https://github.com/mmicko/yosys into yosys-0.8-rc | Clifford Wolf | 2018-09-23 | 1 | -11/+11 | |
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| | * | | | | | added prefix to FDirection constants, fixing windows build | Miodrag Milanovic | 2018-09-21 | 1 | -11/+11 | |
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| * | | | | | | Update CHANGELOG | Clifford Wolf | 2018-09-23 | 1 | -2/+35 | |
| |/ / / / / | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| * | | | | | Update CHANGLELOG | Clifford Wolf | 2018-09-21 | 1 | -5/+27 | |
| | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| * | | | | | Update Changelog | Clifford Wolf | 2018-09-21 | 1 | -1/+54 | |
| | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| * | | | | | Merge pull request #633 from mmicko/master | Clifford Wolf | 2018-09-19 | 3 | -1/+14 | |
| |\ \ \ \ \ | | | | | | | | | | | | | Fix Cygwin build and document needed packages | |||||
| | * | | | | | Fix Cygwin build and document needed packages | Miodrag Milanovic | 2018-09-19 | 3 | -1/+14 | |
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| * | | | | | Merge pull request #631 from acw1251/master | Clifford Wolf | 2018-09-19 | 2 | -5/+5 | |
| |\ \ \ \ \ | |/ / / / |/| | | | | Fixed typo in "verilog_write" help message | |||||
| | * | | | | Fixed typo in "verilog_write" help message | acw1251 | 2018-09-18 | 2 | -5/+5 | |
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| * | | | | Merge pull request #625 from aman-goel/master | Clifford Wolf | 2018-09-14 | 1 | -1/+7 | |
| |\ \ \ \ | | |_|/ | |/| | | Minor revision to -expose in setundef pass | |||||
| | * | | | Minor revision to -expose in setundef pass | Aman Goel | 2018-09-10 | 1 | -1/+7 | |
| | | | | | | | | | | | | | | | | | Adds default value option as -undef when -expose used. Not having set the value mode set can cause the setundef pass to abort. | |||||
| * | | | | Merge pull request #627 from acw1251/master | Clifford Wolf | 2018-09-14 | 1 | -1/+1 | |
| |\ \ \ \ | | | | | | | | | | | Fixed minor typo in "sim" help message | |||||
| | * | | | | Fixed minor typo in "sim" help message | acw1251 | 2018-09-12 | 1 | -1/+1 | |
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| * | / / | Add iCE40 SB_SPRAM256KA simulation model | Clifford Wolf | 2018-09-10 | 1 | -9/+30 | |
| | |/ / |/| | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| * | | | Add $lut support to Verilog back-end | Clifford Wolf | 2018-09-06 | 1 | -0/+13 | |
| | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| * | | | Add "verific -L <int>" option | Clifford Wolf | 2018-09-04 | 3 | -2/+16 | |
| | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| * | | | Add "make ystests" | Clifford Wolf | 2018-08-30 | 3 | -0/+10 | |
| | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| * | | | Add GCC to osx deps (#620) | Miodrag Milanović | 2018-08-28 | 1 | -1/+1 | |
| | | | | | | | | | | | | | | | | | | | * Add GCC to osx deps * Force gcc-7 install | |||||
| * | | | Merge pull request #619 from mmicko/master | Clifford Wolf | 2018-08-28 | 2 | -6/+0 | |
| |\ \ \ | | | | | | | | | Remove mercurial, since it is not needed anymore | |||||
| | * | | | Remove mercurial, since it is not needed anymore | Miodrag Milanovic | 2018-08-28 | 2 | -6/+0 | |
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| * | | | Merge pull request #618 from ucb-bar/firrtl+modules+shiftfixes | Clifford Wolf | 2018-08-28 | 1 | -17/+112 | |
| |\ \ \ | | | | | | | | | Add support for modules. | |||||
| | * \ \ | Merge branch 'master' into firrtl+modules+shiftfixes | Jim Lawson | 2018-08-27 | 12 | -39/+92 | |
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| | | * \ \ | Merge pull request #3 from YosysHQ/master | Jim Lawson | 2018-08-27 | 12 | -39/+92 | |
| | | |\ \ \ | |_|/ / / |/| | | | | merge with YosysHQ | |||||
| * | | | | | Add "make coverage" | Clifford Wolf | 2018-08-27 | 8 | -13/+21 | |
| | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| * | | | | | Add ENABLE_GCOV build option | Clifford Wolf | 2018-08-27 | 1 | -0/+11 | |
| | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| * | | | | | Merge pull request #617 from mmicko/master | Clifford Wolf | 2018-08-25 | 1 | -1/+1 | |
| |\ \ \ \ \ | | | | | | | | | | | | | static link flag on main executable | |||||
| | * | | | | | static link flag on main executable | Miodrag Milanovic | 2018-08-25 | 1 | -1/+1 | |
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| * | | | | | Merge pull request #610 from udif/udif_specify_round2 | Clifford Wolf | 2018-08-23 | 1 | -16/+39 | |
| |\ \ \ \ \ | | | | | | | | | | | | | More specify/endspecify fixes | |||||
| | * | | | | | Fixed all known specify/endspecify issues, without breaking 'make test'. | Udi Finkelstein | 2018-08-20 | 1 | -12/+12 | |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some the of parser fixes may look strange but they were needed to avoid shift/reduce conflicts, due to the explicit parentheses in path_delay_value, and the mintypmax values without parentheses | |||||
| | * | | | | | Yosys can now parse ↵ | Udi Finkelstein | 2018-08-20 | 1 | -10/+22 | |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://github.com/verilog-to-routing/vtr-verilog-to-routing/blob/master/vtr_flow/primitives.v , (specify block ignored). Must use 'read_verilog -defer' due to a parameter not assigned a default value. | |||||
| | * | | | | | A few minor enhancements to specify block parsing. | Udi Finkelstein | 2018-08-15 | 1 | -2/+13 | |
| | | | | | | | | | | | | | | | | | | | | | | | | | Just remember specify blocks are parsed but ignored. | |||||
| * | | | | | | Merge pull request #614 from udif/pr_disable_dump_ptr | Clifford Wolf | 2018-08-23 | 3 | -9/+20 | |
| |\ \ \ \ \ \ | | | | | | | | | | | | | | | Added -no_dump_ptr flag for AST dump options in 'read_verilog' | |||||
| | * | | | | | | Added -no_dump_ptr flag for AST dump options in 'read_verilog' | Udi Finkelstein | 2018-08-23 | 3 | -9/+20 | |
| |/ / / / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This option disables the memory pointer display. This is useful when diff'ing different dumps because otherwise the node pointers makes every diff line different when the AST content is the same. | |||||
| | | * | | | | Remove unused functions. | Jim Lawson | 2018-08-27 | 1 | -10/+0 | |
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| | | * | | | | Add support for module instances. | Jim Lawson | 2018-08-23 | 1 | -17/+122 | |
| | | |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Don't pad logical operands to one bit. Use operand width and signedness in $reduce_bool. Shift amounts are unsigned and shouldn't be padded. Group "is invalid" with the wire declaration, not its use (otherwise it is incorrectly wired to 0). | |||||
| | | * | | | Merge pull request #1 from YosysHQ/master | Jim Lawson | 2018-08-22 | 196 | -770/+2533 | |
| | | |\ \ \ | |_|/ / / |/| | | | | merge with YosysHQ master | |||||
| * | | | | | Add "verific -work" help message | Clifford Wolf | 2018-08-22 | 1 | -0/+7 | |
| | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| * | | | | | Add Verific -work parameter | Clifford Wolf | 2018-08-22 | 1 | -8/+18 | |
| | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| * | | | | | Merge pull request #606 from cr1901/show-win | Clifford Wolf | 2018-08-19 | 1 | -3/+20 | |
| |\ \ \ \ \ | | | | | | | | | | | | | `show` pass `-format` and `-viewer` improvements on Windows | |||||
| | * | | | | | Update show pass documentation with Windows caveats. | William D. Jones | 2018-08-15 | 1 | -1/+2 | |
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| | * | | | | | Fix run_command() when using -format and -viewer in show pass. | William D. Jones | 2018-08-15 | 1 | -2/+18 | |
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