| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Merge remote-tracking branch 'origin/xaig' into xc7mux | Eddie Hung | 2019-06-27 | 1 | -7/+10 |
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| | * | Add warning if synth_xilinx -abc9 with family != xc7 | Eddie Hung | 2019-06-27 | 1 | -0/+2 |
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| | * | Remove unneeded include | Eddie Hung | 2019-06-27 | 1 | -3/+0 |
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| | * | Merge origin/master | Eddie Hung | 2019-06-27 | 10 | -65/+480 |
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| * | | Merge remote-tracking branch 'origin/clifford/fix1132' into xc7mux | Eddie Hung | 2019-06-27 | 1 | -6/+25 |
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| | * | | Copy tests from eddie/fix1132 | Eddie Hung | 2019-06-27 | 1 | -0/+320 |
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| | * | | Fix handling of partial covers in muxcover, fixes #1132 | Clifford Wolf | 2019-06-27 | 1 | -6/+25 |
| | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | | | Revert muxcover.cc to master | Eddie Hung | 2019-06-27 | 1 | -35/+17 |
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| * | | | MUXF78 -> $__MUXF78 to indicate internal | Eddie Hung | 2019-06-26 | 1 | -1/+1 |
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| * | | | Merge remote-tracking branch 'origin/xaig' into xc7mux | Eddie Hung | 2019-06-26 | 7 | -47/+56 |
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| | * | | Fix spacing | Eddie Hung | 2019-06-26 | 1 | -38/+38 |
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| | * | | Improve debugging message for comb loops | Eddie Hung | 2019-06-26 | 1 | -4/+6 |
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| | * | | Add WE to ECP5 dist RAM's abc_scc_break too | Eddie Hung | 2019-06-26 | 1 | -1/+1 |
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| | * | | Update comment on boxes | Eddie Hung | 2019-06-26 | 2 | -4/+6 |
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| | * | | Add "WE" to dist RAM's abc_scc_break | Eddie Hung | 2019-06-26 | 1 | -3/+3 |
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| | * | | Support more than one port in the abc_scc_break attr | Eddie Hung | 2019-06-26 | 1 | -38/+42 |
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| | * | | Add write_xaiger into CHANGELOG | Eddie Hung | 2019-06-26 | 1 | -0/+1 |
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| | * | | Merge branch 'koriakin/xc7nocarrymux' into xaig | Eddie Hung | 2019-06-26 | 0 | -0/+0 |
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| | | * | | Grrr | Eddie Hung | 2019-06-26 | 1 | -2/+2 |
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| * | | | | synth_xilinx's muxcover call to be very conservative -- -nodecode | Eddie Hung | 2019-06-26 | 1 | -1/+1 |
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| * | | | | Accidentally removed "simplemap $mux" | Eddie Hung | 2019-06-26 | 1 | -0/+1 |
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| * | | | | Replace with <internal options> | Eddie Hung | 2019-06-26 | 1 | -2/+2 |
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| * | | | | Rework help_mode for synth_xilinx -widemux | Eddie Hung | 2019-06-26 | 1 | -22/+23 |
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| * | | | | Merge remote-tracking branch 'origin/eddie/fix1132' into xc7mux | Eddie Hung | 2019-06-26 | 1 | -12/+11 |
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| | * | | | | Emprically (even if I don't fully understand it) this passes picorv32 tb | Eddie Hung | 2019-06-26 | 1 | -12/+11 |
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| * | | | | | Merge remote-tracking branch 'origin/eddie/fix1132' into xc7mux | Eddie Hung | 2019-06-26 | 1 | -1/+1 |
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| | * | | | | Remove redundant check (done further down) | Eddie Hung | 2019-06-26 | 1 | -1/+1 |
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| * | | | | | Return to upstream synth_xilinx with opt -full and wreduce | Eddie Hung | 2019-06-26 | 1 | -19/+3 |
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| * | | | | | Merge remote-tracking branch 'origin/eddie/fix1132' into xc7mux | Eddie Hung | 2019-06-26 | 1 | -1/+1 |
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| | * | | | | Restore sigmap wrapper | Eddie Hung | 2019-06-26 | 1 | -1/+1 |
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| * | | | | | Merge remote-tracking branch 'origin/eddie/fix1132' into xc7mux | Eddie Hung | 2019-06-26 | 2 | -55/+210 |
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| | * | | | | Add more tests | Eddie Hung | 2019-06-26 | 1 | -0/+152 |
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| | * | | | | muxcover to be undef-sensitive when computing decoders | Eddie Hung | 2019-06-26 | 1 | -21/+40 |
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| | * | | | | Revert "Rework muxcover decoder gen if more significant muxes are 1'bx" | Eddie Hung | 2019-06-26 | 1 | -55/+39 |
| | | | | | | | | | | | | | | | | | | | | | This reverts commit b2b5cf78e21def63c54c080217d77afefba8e4c7. | ||||
| | * | | | | Let's not go crazy: use nonzero costs | Eddie Hung | 2019-06-26 | 1 | -6/+6 |
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| * | | | | | Merge remote-tracking branch 'origin/eddie/fix1132' into xc7mux | Eddie Hung | 2019-06-26 | 9 | -91/+350 |
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| | * | | | | Rework muxcover decoder gen if more significant muxes are 1'bx | Eddie Hung | 2019-06-26 | 1 | -39/+55 |
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| | * | | | | Add tests | Eddie Hung | 2019-06-26 | 1 | -0/+168 |
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| | * | | | Merge pull request #1137 from mmicko/cell_sim_fix | Clifford Wolf | 2019-06-26 | 2 | -14/+1 |
| | |\ \ \ | | | | | | | | | | | Simulation model verilog fix | ||||
| | | * | | | Simulation model verilog fix | Miodrag Milanovic | 2019-06-26 | 2 | -14/+1 |
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| | * | | | Improve opt_clean handling of unused public wires | Clifford Wolf | 2019-06-26 | 1 | -2/+2 |
| | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| | * | | | Improve BTOR2 handling of undriven wires | Clifford Wolf | 2019-06-26 | 1 | -3/+27 |
| | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| | * | | | Fix segfault on failed VERILOG_FRONTEND::const2ast, closes #1131 | Clifford Wolf | 2019-06-26 | 1 | -1/+1 |
| | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| | * | | | Do not clean up buffer cells with "keep" attribute, closes #1128 | Clifford Wolf | 2019-06-26 | 1 | -1/+1 |
| | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| | * | | | Escape scope names starting with dollar sign in smtio.py | Clifford Wolf | 2019-06-26 | 1 | -1/+4 |
| | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| | * | | | Add more ECP5 Diamond flip-flops. | whitequark | 2019-06-26 | 2 | -30/+91 |
| | | | | | | | | | | | | | | | | | | | | | This includes all I/O registers, and a few more regular FFs where it was convenient. | ||||
| * | | | | Instead of blocking wreduce on $mux, use -keepdc instead #1132 | Eddie Hung | 2019-06-26 | 1 | -2/+2 |
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| * | | | | Do not call opt with -full before muxcover | Eddie Hung | 2019-06-26 | 1 | -1/+1 |
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| * | | | | Merge remote-tracking branch 'origin/xaig' into xc7mux | Eddie Hung | 2019-06-26 | 1 | -1/+1 |
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| | * | | | Remove unused var | Eddie Hung | 2019-06-26 | 1 | -1/+1 |
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index : iCE40/yosys | |
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