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* Bugfix in hierarchy blackbox module port width handlingClifford Wolf2018-01-071-1/+2
* Update ABC to hg rev 6e3c24b3308aClifford Wolf2018-01-071-1/+1
* Merge pull request #479 from Fatsie/latch_without_dataClifford Wolf2018-01-051-4/+23
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| * Some standard cell libraries include a latch with only set/reset.Staf Verhaegen2018-01-031-4/+23
* | Bugfix in hierarchy handling of blackbox module portsClifford Wolf2018-01-055-9/+10
* | Merge pull request #480 from Fatsie/liberty_value_expressionClifford Wolf2018-01-041-2/+22
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| * | Value of properties can be expression.Staf Verhaegen2018-01-031-2/+22
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* / Temporarily derive blackbox modules in hierarchy to evaluate port widthsClifford Wolf2018-01-041-1/+14
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* Add "no driver for signal bit" error msg to btor back-endClifford Wolf2017-12-241-0/+2
* Bugfix in verilog_defaults argument parserClifford Wolf2017-12-241-1/+1
* Fix minor typo in "prep" help messageClifford Wolf2017-12-191-1/+1
* Simple fix BTOR memory encodingClifford Wolf2017-12-171-2/+2
* Improve BTOR memory encodingClifford Wolf2017-12-171-2/+16
* Merge branch 'btor-ng'Clifford Wolf2017-12-154-987/+959
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| * Add array support to btor back-endClifford Wolf2017-12-151-6/+169
| * Add $anyconst/$anyseq support to btor back-endClifford Wolf2017-12-151-13/+51
| * Merge branch 'master' into btor-ngClifford Wolf2017-12-144-8/+12
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* | Add yosys-smtbmc VCD writer support for memories with async writesClifford Wolf2017-12-143-7/+11
* | Fix a bug in clk2fflogic memory handlingClifford Wolf2017-12-141-1/+1
| * Merge branch 'master' into btor-ngClifford Wolf2017-12-149-38/+178
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* | Add clk2fflogic memory supportClifford Wolf2017-12-141-1/+77
* | Add smt2 back-end support for async write memoriesClifford Wolf2017-12-141-14/+53
* | Add RTLIL::Const::is_fully_ones()Clifford Wolf2017-12-142-0/+12
* | Add SigSpec::is_fully_ones()Clifford Wolf2017-12-142-0/+16
* | Merge pull request #469 from kkiningh/masterClifford Wolf2017-12-142-2/+2
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| * | Use quote includes for yosys.hKevin Kiningham2017-12-132-2/+2
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* | Check for memories in clk2fflogicClifford Wolf2017-12-131-0/+5
* | Merge pull request #468 from grahamedgecombe/fix-sb-io-odClifford Wolf2017-12-131-19/+19
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| * | Fix port names in SB_IO_ODGraham Edgecombe2017-12-101-18/+18
| * | Remove trailing comma from SB_IO_OD port listGraham Edgecombe2017-12-101-1/+1
* | | Add warnings for driver-driver conflicts between FFs (and other cells) and co...Clifford Wolf2017-12-122-3/+11
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| * Add "write_btor -s" modeClifford Wolf2017-12-131-6/+50
| * Add state initval handling to btor back-endClifford Wolf2017-12-121-0/+25
| * Add btor back-end support for 'x' constantsClifford Wolf2017-12-121-1/+54
| * Add SigSpec::is_fully_ones()Clifford Wolf2017-12-122-0/+16
| * Add btor $shift/$shiftx supportClifford Wolf2017-12-112-7/+37
| * Fix btor back-end shift handlingClifford Wolf2017-12-102-5/+7
| * Add support for $pmux in btor back-endClifford Wolf2017-12-101-0/+23
| * Add support for more cell types to btor back-endClifford Wolf2017-12-102-6/+245
| * Merge branch 'master' into btor-ngClifford Wolf2017-12-101-69/+122
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* | Add support for Verific PRIM_SVA_NOT propertiesClifford Wolf2017-12-101-10/+25
* | Add Verific OPER_SVA_STABLE supportClifford Wolf2017-12-101-2/+32
* | Refactoring Verific SVA rewriterClifford Wolf2017-12-101-62/+70
| * Fix btor concatClifford Wolf2017-12-091-1/+1
| * Merge branch 'master' into btor-ngClifford Wolf2017-12-094-4/+9
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* | Merge pull request #467 from mithro/patch-1Clifford Wolf2017-12-091-1/+1
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| * | Fix spelling in -vpr help for synth_ice40Tim Ansell2017-12-081-1/+1
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* | Use "hg ... --insecure" for cloning/pulling ABCClifford Wolf2017-12-031-2/+2
* | Update ABC to hg rev 31fc97b0aeedClifford Wolf2017-12-021-1/+1
* | Fix error handling for nested always/initialClifford Wolf2017-12-022-0/+5
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